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# IEEE Transactions on Electron Devices

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Displaying Results 1 - 25 of 52

Publication Year: 2012, Page(s):C1 - 2282
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• ### IEEE Transactions on Electron Devices publication information

Publication Year: 2012, Page(s): C2
| PDF (52 KB)
• ### New Subject Heading on “Memory Devices and Technology”

Publication Year: 2012, Page(s): 2283
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• ### A Quasi-Two-Dimensional Threshold Voltage Model for Short-Channel Junctionless Double-Gate MOSFETs

Publication Year: 2012, Page(s):2284 - 2289
Cited by:  Papers (39)
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Based on the bulk conduction mode of the quasi-2-D scaling theory, an analytical threshold voltage model for short-channel junctionless (JL) double-gate MOSFETs is developed for the first time. The model explicitly shows how the device parameters such as the silicon thickness, oxide thickness, drain bias, and channel length affect the threshold voltage degradation. The model can also be extended t... View full abstract»

• ### The Effective Mass, Band Gap, Device Characteristics, and Performance Considerations for AGNR and AGNRFETs

Publication Year: 2012, Page(s):2290 - 2295
Cited by:  Papers (3)
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In this paper, we introduce our work on material characteristics, device characteristics, and performance considerations for armchair graphene nanoribbons (AGNRs) and AGNR field-effect transistors (AGNRFETs). First, we show that the effective-mass-versus-band-gap relationship can be described by a group of lines. By simply tight-binding a model considering only the first-nearest neighbor interacti... View full abstract»

• ### High-Frequency Modeling of Poly-Si Thin-Film Transistors for Low-Cost RF Applications

Publication Year: 2012, Page(s):2296 - 2301
Cited by:  Papers (5)
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In this paper, we present high-frequency characteristics of transistors and inductors in low-temperature polycrystalline-silicon thin-film transistor (LTPS TFT) technology for low-cost radio frequency applications. From 2-D device simulations, we show that the linearity of LTPS TFTs is independent of the channel length due to the presence of grain boundaries. Furthermore, since LTPS TFTs can be fa... View full abstract»

• ### Ultrafast Resistive-Switching Phenomena Observed in NiN-Based ReRAM Cells

Publication Year: 2012, Page(s):2302 - 2307
Cited by:  Papers (15)
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In this paper, for the first time, we report the fabrication of a resistive random access memory (ReRAM) device using Ti/NiN/Pt structure cells and its observed bipolar resistive-switching characteristics in the pulsed mode. In these experiments, NiN-based ReRAM showed excellent switching behavior under $+$2.4 V/3.3 ns and ... View full abstract»

• ### Device Design and Estimated Performance for p-Type Junctionless Transistors on Bulk Germanium Substrates

Publication Year: 2012, Page(s):2308 - 2313
Cited by:  Papers (13)
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The junctionless nanowire transistor (JNT) has recently been demonstrated to be a promising device for sub-20-nm nodes. So far, most devices were made on semiconductor-on-insulator substrates. The aim of this work is to evaluate the concept of multigate germanium (Ge) JNTs on bulk substrates, using a dedicated modeling methodology. The variation of device performance due to geometry, channel, and ... View full abstract»

• ### Study on Characteristics of Poly-Si TFTs With 3-D Finlike Channels Fabricated by Nanoimprint Technology

Publication Year: 2012, Page(s):2314 - 2320
Cited by:  Papers (7)
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This study addresses the characteristics of polycrystalline-silicon thin-film transistors (poly-Si TFTs) with 3-D finlike channels fabricated using ultraviolet nanoimprint lithography. The poly-Si 3-D finlike channels with a line width/space ratio of about $sim$1 : 1 were fabricated and studied by scanning electron mic... View full abstract»

• ### A Correlation-Considered Variation-Aware Interconnect Parasitic Profile Extraction Method

Publication Year: 2012, Page(s):2321 - 2326
Cited by:  Papers (4)
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This paper presents a novel technique of performing correlation-considered statistical interconnect parasitic parameter extraction on 40-nm process technology. Five test structures are designed for the extraction. Then, 3-D simulations are performed, and typical interconnect technology profile (ITP) file is extracted. Based on the full mapping measurements of test structures, their distribution an... View full abstract»

• ### Effect of Tunnel Recombination Junction on Crossover Between the Dark and Illuminated Current–Voltage Curves of Tandem Solar Cells

Publication Year: 2012, Page(s):2327 - 2330
Cited by:  Papers (2)
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The tunnel recombination junction (TRJ) quality of an amorphous silicon (a-Si)-based tandem junction solar cell can have a significant impact on its performance, where crossover between the dark and illuminated current–voltage curves of a tandem cell indicates a TRJ with poor quality. Therefore, it is critical to be able to understand the TRJ characteristics in order to optimize the tandem ... View full abstract»

• ### String Current in Decananometer nand Flash Arrays: A Compact-Modeling Investigation

Publication Year: 2012, Page(s):2331 - 2337
Cited by:  Papers (4)
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This paper presents a detailed compact-modeling investigation of the string current in decananometer nand Flash arrays. This investigation allows, first of all, to highlight the role of velocity saturation, low-field mobility, and drain-induced barrier lowering on the string current versus read voltage characteristics. Results are validated on a 41-nm technology for different positions of the sele... View full abstract»

• ### Studies on Halo Implants in Controlling Short-Channel Effects of Nanoscale Ge Channel pMOSFETs

Publication Year: 2012, Page(s):2338 - 2344
Cited by:  Papers (3)
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We report the impact of halo implants on short-channel effects of nanoscale Ge channel pMOSFETs in terms of different electrical device parameters such as threshold voltage ($V_{rm TH}$ ), subthreshold slope (SS), and drain-induced barrier lowering. The analysis is based on 2-D surface potential approach taking into account the inte... View full abstract»

• ### Transient Thermal Resistance Test of Single-Crystal-Silicon Solar Cell

Publication Year: 2012, Page(s):2345 - 2349
Cited by:  Papers (2)
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This paper reports the measurement of the junction temperature and the determination of the thermal resistance of the single-crystal-silicon solar cell under the dark and illuminating conditions, respectively. Under the dark condition, the solar cell is considered as a conventional p-n junction and is subject to a reverse current in order to measure its junction temperature and determine the therm... View full abstract»

• ### Reduction of Charge Trapping in $hbox{HfO}_{2}$ Film on Ge Substrates by Atomic Layer Deposition of Various Passivating Interfacial Layers

Publication Year: 2012, Page(s):2350 - 2356
Cited by:  Papers (3)
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The dielectric performance and charge trapping properties of $hbox{HfO}_{2}$ on a Ge substrate with various passivating interfacial layers (PILs), such as $hbox{SiO}_{x}hbox{N}_{y}$, $hbox{AlO}_{x}hbox{N}_{y}$... View full abstract»

• ### Improved Off-State Reliability of Nonvolatile Resistive Switch With Low Programming Voltage

Publication Year: 2012, Page(s):2357 - 2362
Cited by:  Papers (12)
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A complementary atom switch (CAS) is proposed to realize low programming voltage and high off-state reliability for crossbar switch application. Two atom switches with bipolar operation are connected in series with opposite direction, in which the two atom switches work as a single element. The two off-state atom switches in the CAS complementarily divide voltage stress, greatly enlarging the off-... View full abstract»

• ### Resistive Switching Behavior of Partially Anodized Aluminum Thin Film at Elevated Temperatures

Publication Year: 2012, Page(s):2363 - 2367
Cited by:  Papers (6)
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Resistive switching behavior of partially anodized aluminum thin film has been investigated at temperatures of 25 $^{circ}hbox{C}$–250 $^{circ}hbox{C}$. Both the reset and set voltages decrease with increasing temperature, showing Arrhenius-like dependence wit... View full abstract»

• ### Optoelectronic Performance of Radial-Junction Si Nanopillar and Nanohole Solar Cells

Publication Year: 2012, Page(s):2368 - 2374
Cited by:  Papers (7)
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Two typical radial-junction structures, Si nanopillars (SiNP) and nanoholes, were modeled and compared for solar cell applications. From the physical model using the transport equations, the output performances, e.g., short-circuit current density, open-circuit voltage, energy conversion efficiency, fill factor, etc., were simulated. A maximum efficiency of 21.0 View full abstract»

• ### Performance Evaluation of III–V Nanowire Transistors

Publication Year: 2012, Page(s):2375 - 2382
Cited by:  Papers (29)
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III–V nanowire (NW) transistors are an emerging technology with the prospect of high performance and low power dissipation. Performance evaluations of these devices, however, have focused mostly on the intrinsic properties of the NW, excluding any parasitic elements. In this paper, a III–V NW transistor architecture is investigated, based on a NW array with a realistic footprint. Bas... View full abstract»

• ### Interface-State Modeling of $hbox{Al}_{2}hbox{O}_{3}$ –InGaAs MOS From Depletion to Inversion

Publication Year: 2012, Page(s):2383 - 2389
Cited by:  Papers (37)
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This paper presents a detailed analysis of the multifrequency capacitance–voltage and conductance–voltage data of $hbox{Al}_{2}hbox{O}_{3}/hbox{n-InGaAs}$ MOS capacitors. It is shown that the widely varied frequency dependence of the data from depletion to inversion can be fitted to various regional equivalent circuit... View full abstract»

• ### A Rigorous Classical Solution for the Drain Current of Doped Symmetric Double-Gate MOSFETs

Publication Year: 2012, Page(s):2390 - 2395
Cited by:  Papers (2)
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We propose a new classical physics rigorous description of the drain current of long channel symmetric double-gate MOSFET with a doped body based on a single integral equation. Whereas existing descriptions are valid for limited ranges of doping concentrations, the equation presented here is valid for any doping concentration, including the so-called intrinsic body case. The description is based o... View full abstract»

• ### A Physical Model for Grain-Boundary-Induced Threshold Voltage Variation in Polysilicon Thin-Film Transistors

Publication Year: 2012, Page(s):2396 - 2402
Cited by:  Papers (8)
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Grain boundaries (GBs) in the channel region of polysilicon thin-film transistors (poly-Si TFTs) lead to large variations in the performance of TFTs (delay and power). In this paper, we present a physical model to characterize the GB-induced transistor threshold voltage variations considering not only the number but also the position and orientation of each GB in 3-D space. The estimated threshold... View full abstract»

• ### Investigation of Hole-Blocking Contacts for High-Conversion-Gain Amorphous Selenium Detectors for X-Ray Imaging

Publication Year: 2012, Page(s):2403 - 2409
Cited by:  Papers (17)  |  Patents (1)
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In this paper, we investigated different organic and inorganic hole-blocking contacts for amorphous selenium (a-Se)-based photodetectors: $hbox{CeO}_{2}$, $hbox{TiO}_{2}$, perylene tetracarboxylic bisbenzimidazole (PTCBI), and polyimide (PI). ... View full abstract»

• ### Dark Current in Silicon Photomultiplier Pixels: Data and Model

Publication Year: 2012, Page(s):2410 - 2416
Cited by:  Papers (12)  |  Patents (1)
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The dark current behavior of the pixels forming the Si photomultiplier as a function of the applied overvoltage and operation temperature is studied. The data are modeled by assuming that dark current is caused by current pulses triggered by events of diffusion of single minority carriers injected from the peripheral boundaries of the active area depletion layer and by thermal emission of carriers... View full abstract»

• ### A Comparative Study of Gate Structures for 9.4-kV 4H-SiC Normally On Vertical JFETs

Publication Year: 2012, Page(s):2417 - 2423
Cited by:  Papers (2)  |  Patents (1)
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This paper reports the development of 9.4-kV 4H-SiC normally on lateral-channel vertical JFETs. The developed JFETs utilize a buried layer to create a lateral conduction channel, shielding the source from the effects of drain bias. The lowest measured $R_{rm on, sp}$ was 127 ... View full abstract»

## Aims & Scope

IEEE Transactions on Electron Devices publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects.

Full Aims & Scope

## Meet Our Editors

Editor-in-Chief

Giovanni Ghione
Politecnico di Torino,
10129 Torino, Italy