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Power Electronics, IET

Issue 5 • Date May 2012

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Displaying Results 1 - 13 of 13
  • Investigation of closed-loop performance for an LCL resonant converter in a real-time operating system environment

    Publication Year: 2012 , Page(s): 511 - 523
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (1125 KB)  

    This study presents a comparative evaluation of proportional integral (PI) controller and fuzzy logic controller (FLC) for a modified Inductance-Capacitance-Inductance resonant converter. It has been simulated and the performance is analysed. A three-element LCL resonant converter working under load-independent operation is presented in this study. In this study, the applicability of the Philips Advanced RISC Machine (ARM) processor LPC 2148 is also investigated as the controller for resonant converter. The comparison study indicates the superiority of fuzzy control over the conventional control methods and these results are presented. MATLAB was used to model the LCL topology for varied loads and LCL configurations. The LCL resonant inverter is proposed for applications in high-frequency distributed AC power systems and resonant converter is proposed for applications in many space and radar power supplies. This study presents the design, simulation and experimental results for a 133-W, 50-KHz LCL resonant converter having efficiencies >;89>; down to resistive loads of 50>;. Efficiencies >;80>; were obtained at significantly reduced loads (11>;). View full abstract»

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  • High step-up converter with capacity of multiple input

    Publication Year: 2012 , Page(s): 524 - 531
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (766 KB)  

    In this paper, a multiple-input high step-up boost converter is presented for grid-connected photovoltaic power generation system. Firstly, the derivation of the converter with dual input is presented and its operation principle and steady state performance arc analyzed in detail. Secondly, the n-input high step-up boost converter made up of n boost cells is deduced. Its high step-up ratio and the relationship among the input currents are analyzed. Finally, an experimental prototype rated 100 W is built and the experimental results are given. View full abstract»

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  • Digital current controllers applied to the boost power factor correction converter with load variation

    Publication Year: 2012 , Page(s): 532 - 541
    Cited by:  Papers (1)
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (1116 KB)  

    This study proposes two digital predictive current controllers applied to the boost power factor correction (PFC) converter able to operate with a load variation up to 600 W. A comparison between them is made to determine which controller presents the best performance and benefit cost ratio. They have in common the possibility of operation in discontinuous, mixed and continuous conduction modes. This operation capability yields several advantages to boost PFC converters with variable loads, as will be discussed. The control laws and the structure of the proposed controllers are shown in detail. Implementation issues (hardware and software) are also shown. Experimental results point out that high converter power factor and low input current total harmonic distortion (THD) are achieved over the entire output power range using both current controllers, with a low implementation cost. View full abstract»

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  • Quasi-two-level and three-level operation of a diode-clamped multilevel inverter using space vector modulation

    Publication Year: 2012 , Page(s): 542 - 551
    Cited by:  Papers (1)
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (971 KB)  

    This study presents space vector-based quasi-two-level operation of a diode-clamped multilevel inverter which improves dc link utilisation and output voltage quality, and avoids the dc link capacitor voltage balancing problem experienced with standard multilevel operation. Beside a review of quasi-two-level operation and the capacitor voltage balancing method, the study presents a detailed discussion on the implementation of space vector modulation and the selection of switching sequence for a five-level inverter. Additionally, the condition for maximum theoretical modulation index for space vector modulation is established. A prototype five-level diode-clamped inverter is to experimentally validate the approach. Also this study extends the concept of quasi-two-level-to-three-level operation of the diode-clamped multilevel inverter in order to address the shortcomings experienced with quasi-two-level operation, such as low waveform quality and high switching losses. The validity of three-level inverter operation is confirmed experimentally on a prototype of a five-level diode-clamped inverter. The study also highlights the limitations of three-level operation of a diode-clamped multilevel inverter. View full abstract»

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  • Practical application of valley current mode control in a flyback converter with a large duty cycle

    Publication Year: 2012 , Page(s): 552 - 560
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (1080 KB)  

    This study proposes the application of valley current mode (VCM) control in a flyback dc-dc converter with a large duty cycle. The use of VCM control eliminates the need of slope compensation in operation under a duty cycle greater than 50-. For operation with duty cycle near the boundary value (50-), a relatively small compensation ramp is required comparing with that of the conventional peak current mode (PCM) control. Moreover, the noise sensitivity issue of PCM control is also addressed by the change of the current sensing position in VCM and hence the immunity against the current spike. The VCM-controlled flyback converter achieves consistent steady-state and transient-response performances as its PCM-controlled counterpart. Stability analyses of inner current loop and overall closed-loop system are presented. Experiments are also conducted to evaluate the effectiveness of VCM control in controlling the flyback dc-dc converter. View full abstract»

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  • Research on a cascaded multilevel inverter by employing three-phase transformers

    Publication Year: 2012 , Page(s): 561 - 570
    Cited by:  Papers (1)
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (1065 KB)  

    Cascaded multilevel H-Bridge inverter is a promising topology and is an alternative for converters that are used for grid-connected photovoltaic/wind-power generators, flexible alternating current systems and motor drive applications. The cascade multilevel inverter (CMI) can flexibly expand the output power capability and favourable to develop because the converter provides modularity in topology, control structure and modulation. A recent version of CMI topology employs a single dc source and low-frequency three-phase transformers. Compared with conventional topologies, this CMI with three-phase transformers facilitates high-quality output waveforms with reduced number of components. Additionally, structure has high degree of freedom for specifying the cost function in terms of filter size, losses and total harmonic distortion (THD). In the present study, the authors proposed three major control techniques for this CMI namely (i) fundamental frequency, (ii) selective harmonic elimination PWM (SHEPWM) and (iii) sinusoidal PWM (SPWM) methods. To demonstrate presented CMI effectively, THD comparison is carried out with conventional seven-level CMI. Selected experimental results are reported to verify and validate the theoretical findings. View full abstract»

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  • Symmetric multilevel inverter with reduced components based on non-insulated dc voltage sources

    Publication Year: 2012 , Page(s): 571 - 581
    Cited by:  Papers (4)
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (926 KB)  

    Multilevel inverters have an important portion in power processing in power systems. These inverters have some inherent advantages such as ability to operate with high power and voltage, improved output waveform quality and flexibility which make them attractive and more popular. This study proposes a new topology based on the non-insulated dc voltage sources for multilevel inverter with reduced number of switching devices. As a result, it reduces control complexity and gate driver circuits. The proposed topology is a general topology which can be easily extended to a desired number of voltage levels. All of the desired output voltage levels (both odd and even) can be achieved using the proposed topology. The validity of the proposed multilevel inverter is verified with both computer simulation and experimental results from a 15-level laboratory prototype. View full abstract»

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  • Control-to-output transfer function of peak currentmode controlled pulse-width modulated dc–dc buck converter in continuous conduction mode

    Publication Year: 2012 , Page(s): 582 - 590
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (1430 KB)  

    The control-to-output transfer function is essential for the design of the compensator in the outer-voltage loop as it represents the plant for the outer-voltage loop in the peak current-mode-controlled converters. The control-to-output transfer function for the peak current-mode-controlled pulse-width-modulated (PWM) dc-dc buck converter is derived using power-stage transfer functions and the modulator transfer function in the inner-current loop. Experimental Bode plots are presented to verify the derived transfer function. The required critical path open-loop duty cycle-to-inductor current and duty cycle-to-output voltage transfer functions for a peak current-mode controlled dc-dc PWM buck converter are derived and experimentally verified. The theoretical results were in good agreement with all the measured Bode plots. View full abstract»

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  • Design of a 1-kVA parallel-type AC voltage sag compensator

    Publication Year: 2012 , Page(s): 591 - 599
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (738 KB)  

    In this study, some issues of voltage sags in the AC mains are discussed. The characteristics of voltage sags and the SEMI F47 requirements are outlined. Existing solutions to solve the voltage sag problems are compared. The design methodologies of AC voltage sag compensators are introduced. The detailed design and the flow chart of the control programme of a new parallel-type AC voltage sag compensator are described. The main advantage of the parallel-type compensator is that it can disconnect the load from the AC mains to eliminate the effects of interruptions or faults that occur in the AC mains during the compensation period. A practical 1-kVA parallel-type voltage sag compensator has been designed and constructed for evaluation. Measurements have been carried out to verify the performance of the compensator under different voltage sag conditions. View full abstract»

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  • Control strategy of a cross-phase-connected unified power quality conditioner

    Publication Year: 2012 , Page(s): 600 - 608
    Cited by:  Papers (1)
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (941 KB)  

    A three-phase unified power quality conditioner (UPQC) with cross-phase connection is investigated. The UPQC is designed to mitigate voltage sags/swells, including those resulting from single-phase faults. Based on an analysis of the configuration of the conditioner, multi-loop control schemes are proposed for the voltage and current compensation strategies. The practicability of the topology and the effectiveness of the control schemes are verified through simulations using PSCAD/EMTDC. The results demonstrate the proposed control strategy for the cross-phase-connected UPQC is capable of regulating load terminal voltage and compensating load current changes simultaneously and effectively. View full abstract»

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  • Simplified multilevel space vector pulse-width modulation scheme based on two-level space vector pulse-width modulation

    Publication Year: 2012 , Page(s): 609 - 616
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (803 KB)  

    A novel simplified multilevel space vector pulse-width modulation (SVM) scheme is proposed based on the two-level SVM. The voltage vectors with same amplitude and phase angle are applied to the various power units of cascaded multilevel inverter (CMLI), and the refresh times of various vectors are delayed in order, thus the corresponding multilevel output voltage waveform is formatted. During every sampling period, only the on-times of main and auxiliary voltage vectors of one-stage unit are calculated based on a two-level SVM algorithm, so the computational complexity is independent on the unit-cascaded number. Then the algorithm is simplified, and the expandability is enhanced. The simulation and experimental results prove the validity and feasibility of the novel scheme. View full abstract»

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  • Average sliding control method applied on power factor correction converter for decreasing input current total harmonic distortion using digital signal processor

    Publication Year: 2012 , Page(s): 617 - 626
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (1292 KB)  

    This study presents an average sliding control (ASC) method to be used in power factor correction (PFC) circuits to decrease the total harmonic distortion (THD) of the input current by eliminating the input current harmonics. The ASC algorithm is adapted to TMS320F2812 digital signal processor (DSP) owing to its well-known properties, such as robustness, stability and good regulation in a wide range of operating conditions. The control approach is operated in continuous conduction mode. In this approach, a sinusoidal signal is generated by the DSP and is used as reference in controlling the converter switch to obtain a sinusoidal input current based on zero-crossing points of input voltage. The feed-forward is also used in the control algorithm using maximum value of the input voltage. The implementation of feed-forward improves the converter's performance to obtain a near-unity PFC with a lower input current THD. The converter used in the simulation and experimental studies is a bridgeless converter. The conduction losses of the switches of this converter are lower compared with the similar PFC converters. The experiments performed in the laboratory for different cases of operation verify the theoretical and simulation studies. The experimental results are satisfied by IEC 61000-3-2 current harmonic standard. View full abstract»

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  • Zero-voltage transition–zero-current transition pulsewidth modulation DC–DC buck converter with zero-voltage switching‣zero-current switching auxiliary circuit

    Publication Year: 2012 , Page(s): 627 - 634
    Cited by:  Papers (3)
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (721 KB)  

    In this study, a new zero-voltage transition (ZVT)-zero-current transition (ZCT) quasi-resonant buck converter, which ensures zero crossings at any time required for soft switching (SS) and provides ZVT turn-on and ZCT turn-off together for the main switch of active snubber cell in buck converter is presented. The proposed circuit combines the most of the advantageous features of the circuits presented previously and overcomes most of drawbacks of these circuits by using only one auxiliary switch with fewer other components. Consequently, new ZVT-ZCT quasi-resonant buck converter, which is verified by a prototype of a 0.4-kW and 100-kHz circuit, is analysed in detail. All semiconductor devices operate under SS, the main switch is subjected to no additional voltage and current stresses, and the stress on the auxiliary switch is very low in the proposed new converter. View full abstract»

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Aims & Scope

IET Power Electronics brings together five principal power electronics themes including: applications of power semiconductor technology; circuits; devices; techniques; and performance management.

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