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IEEE Micro

Issue 5 • Date Oct. 1993

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Displaying Results 1 - 9 of 9
  • Protecting industrial property rights

    Publication Year: 1993, Page(s):2 - 3
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (659 KB)

    The author suggests that US patent and copyright law systems can be described in terms of models, which facilitates understanding of their operation and permits some amount of simulation. This may permit the circumstances that impose stresses on the systems and may strain them beyond their limits to be ascertained. The two models, those of patent and copyright law, on which the conventional approa... View full abstract»

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  • The Gmicro/500 superscalar microprocessor with branch buffers

    Publication Year: 1993, Page(s):12 - 22
    Cited by:  Papers (1)  |  Patents (35)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1080 KB)

    The Gmicro/500, which features a RISC-like dual-pipeline structure for high-speed execution of basic instructions and represents a significant advance for the TRON architecture, is presented. Upwardly-object-compatible with earlier members of the Gmicro series, this microprocessor uses resident dedicated branch buffers to greatly enhance branch instruction execution speed. Its microprograms simult... View full abstract»

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  • The mu VP 64-bit vector coprocessor: a new implementation of high-performance numerical computation

    Publication Year: 1993, Page(s):24 - 36
    Cited by:  Papers (7)  |  Patents (36)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2056 KB)

    The architecture and design of the mu VP, a single-chip vector coprocessor developed to meet the needs of high-performance processors, are described. The mu VP is a supercomputer component implemented on a single large-scale-integrated (LSI) CMOS chip. With 206 MFLOPS single-precision and 106-MFLOPS double-precision performance at 50 MHz, the mu VP offers a rate almost equivalent to that typical m... View full abstract»

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  • Fuzzy inference and fuzzy inference processor

    Publication Year: 1993, Page(s):37 - 48
    Cited by:  Papers (35)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1057 KB)

    Fuzzy inference, a data processing method based on the fuzzy theory that has found wide use in the control field, is reviewed. Consumer electronics, which accounts for most current applications of this concept, does not require very high speeds. Although software running on a conventional microprocessor can perform these inferences, high-speed control applications require much greater speeds. A fu... View full abstract»

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  • HDTV research in Japan

    Publication Year: 1993, Page(s):49 - 53
    Cited by:  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (511 KB)

    Research in the area of HDTV undertaken by the Japanese broadcast corporation NHK is reviewed. This includes research to develop high-quality systems for broadcast, transmission, and reception; 3-D technology; HARP technology; camera technology; image composition and picture quality packages; voice recognition systems; recording and tape technology; and displays.<> View full abstract»

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  • The Power PC 601 microprocessor

    Publication Year: 1993, Page(s):54 - 68
    Cited by:  Papers (10)  |  Patents (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1609 KB)

    The PowerPC 601 microprocessor, the first of a family of processors based on the PowerPC architecture, is described. The general-purpose processor contains a 32-Kb cache and a superscalar machine organization that allows dispatch and execution of up to three instructions each clock cycle. The bus interface and storage control mechanisms can be configured for a wide range of system designs, from lo... View full abstract»

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  • Spearmints: hardware support for performance measurements in distributed systems

    Publication Year: 1993, Page(s):69 - 78
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1215 KB)

    Spearmints, a system of hardware components that can be easily interfaced to the nodes of an instrumented distributed system for monitoring or evaluation using event-triggered measurements, is described. Each machine of the target system must have one sensor that collects relevant events and marks them with global time stamps. The sensors can be attached to a common measurement system that samples... View full abstract»

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  • How does processor MHz relate to end-user performance? II. Memory subsystem and instruction set

    Publication Year: 1993, Page(s):79 - 89
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1088 KB)

    For part I, see ibid., vol.13, no.4, p.8-16 (1993). Two processors that compete in the workstation/server markets are compared. The 62.5-MHz IBM RISC System/6000 Model 580 exemplifies a moderate clock rate design. The 133-1200-MHz DEC Alpha processor represents an aggressive clock rate design. The performance implications of the memory subsystems and the effect of instruction sets on path length a... View full abstract»

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  • Cooperation: Japan's new watchword? (software industry)

    Publication Year: 1993, Page(s):90 - 92
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (314 KB)

    As Japan attempts to keep pace with developments in the changing world of high technology and computer science, its government and industry leaders are moving on several fronts simultaneously. Efforts underway in several industries to improve coordination and cooperation between the public and private sector, as well as with foreign entities, are described. The industries include the ASIC chip, di... View full abstract»

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Erik R. Altman
School of Electrical and Computer Engineering
IBM T.J. Watson Research Center