By Topic

Device and Materials Reliability, IEEE Transactions on

Issue 4 • Date Dec. 2011

Filter Results

Displaying Results 1 - 18 of 18
  • [Front cover]

    Publication Year: 2011 , Page(s): C1
    Save to Project icon | Request Permissions | PDF file iconPDF (97 KB)  
    Freely Available from IEEE
  • IEEE Transactions on Device and Materials Reliability publication information

    Publication Year: 2011 , Page(s): C2
    Save to Project icon | Request Permissions | PDF file iconPDF (36 KB)  
    Freely Available from IEEE
  • Table of contents

    Publication Year: 2011 , Page(s): 505
    Save to Project icon | Request Permissions | PDF file iconPDF (42 KB)  
    Freely Available from IEEE
  • What is in a page charge?

    Publication Year: 2011 , Page(s): 506
    Save to Project icon | Request Permissions | PDF file iconPDF (17 KB) |  | HTML iconHTML  
    Freely Available from IEEE
  • Editorial Kudos to Our Reviewers

    Publication Year: 2011 , Page(s): 507
    Save to Project icon | Request Permissions | PDF file iconPDF (16 KB) |  | HTML iconHTML  
    Freely Available from IEEE
  • Introduction to the Special Section on Electrostatic Discharge: From Transistor Technology to Chip Level to System Level

    Publication Year: 2011 , Page(s): 508
    Save to Project icon | Request Permissions | PDF file iconPDF (17 KB) |  | HTML iconHTML  
    Freely Available from IEEE
  • Triggering of Transient Latch-up by System-Level ESD

    Publication Year: 2011 , Page(s): 509 - 515
    Cited by:  Papers (1)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (688 KB) |  | HTML iconHTML  

    This paper investigates the influences of temperature and the trigger parameters (width and rise time) on the threshold of transient latch-up (TLU). It is shown that temperature is a much more critical parameter than transient trigger parameters. For high discharge currents which are typical for system-level surges as, e.g., seen in cable discharge events, even very short trigger pulses can cause ... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • ESD Engineering Fully Silicided Large MOSFET Driver for Maximum It\hbox {1} Performance

    Publication Year: 2011 , Page(s): 516 - 521
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (594 KB) |  | HTML iconHTML  

    Simultaneous optimization of LDD and antipunch-through implant conditions for ESD performance of very large width silicided output driver NMOSFET without snapback mode of operation is reported. Physical mechanisms responsible for performance improvement and device sensitivity to pulse rise time, with little or no dependence on TLP pulsewidth, are detailed. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Comparison of Wafer-Level With Package-Level CDM Stress Facilitated by Real-Time Probing

    Publication Year: 2011 , Page(s): 522 - 530
    Cited by:  Papers (2)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (886 KB) |  | HTML iconHTML  

    Using real-time voltage probing and circuit simulation, the stress induced by wafer-level charged-device-model (CDM) electrostatic discharge test methods is compared to that of package-level field-induced CDM testers. It is shown that, while wafer-level testers can replicate I/O failures, they may not replicate core failures because of differences in the induced current stress. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Temperature Cycling Reliability of High-Temperature Lead-Free Die-Attach Technologies

    Publication Year: 2011 , Page(s): 531 - 539
    Cited by:  Papers (12)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (981 KB) |  | HTML iconHTML  

    The demand for electronics capable of operating at temperatures above the traditional 125°C limit continues to increase. Devices based on wide bandgap semiconductors have been demonstrated to operate at temperatures up to 500°C, but packaging remains the major hurdle to product development. Recent regulations, such as RoHS and WEEE, increase the complexity of the packaging task by pr... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • The Effects of Al Doping and Metallic-Cap Layers on Electromigration Transport Mechanisms in Copper Nanowires

    Publication Year: 2011 , Page(s): 540 - 547
    Cited by:  Papers (2)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (397 KB) |  | HTML iconHTML  

    We investigate electromigration transport mechanisms in Cu and Cu alloy damascene conductors. We show that the drift velocity exhibits a dependence on microstructure. We find that Cu-Al alloys exhibit a small increase in grain boundary diffusion activation energy compared to pure Cu and a reduction in the diffusion prefactor for Cu/cap interfacial transport. Cu-silicide- and CoWP-cap layers are bo... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Defect Analysis on Optical Waveguide Arrays by Synchrotron Radiation Microtomography

    Publication Year: 2011 , Page(s): 548 - 550
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (255 KB) |  | HTML iconHTML  

    In recent years, great attention has been devoted to the study and realization of polymeric optical waveguides embedded in printed circuit boards due to the increasing need of transferring large amounts of data at high speed within computer and telecommunication devices. Nonuniform microstructural defects that can be induced during the manufacturing process can dramatically influence the waveguide... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Neutron-Induced Charge Collection Simulation of Bulk FinFET SRAMs Compared With Conventional Planar SRAMs

    Publication Year: 2011 , Page(s): 551 - 554
    Cited by:  Papers (12)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (560 KB) |  | HTML iconHTML  

    The relative neutron-induced soft-error rate (SER) of bulk FinFET SRAMs compared to planar SRAMs is estimated based on drain area, collected charge, and critical charge using mixed-mode 3-D TCAD simulations. The critical charges of the bulk FinFET and planar devices are comparable, with identical gate length, gate width, and gate oxide thickness. However, the charges collected by the bulk FinFET d... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Thirteenth IEEE International Vacuum Electronics Conference and Ninth IEEE International Vacuum Electron Sources Conference

    Publication Year: 2011 , Page(s): 555
    Save to Project icon | Request Permissions | PDF file iconPDF (1015 KB)  
    Freely Available from IEEE
  • 2012 19th international workshop on active matrix flatpanel displays and devices

    Publication Year: 2011 , Page(s): 556
    Save to Project icon | Request Permissions | PDF file iconPDF (1260 KB)  
    Freely Available from IEEE
  • 2011 Index IEEE Transactions on Device and Materials Reliability Vol. 11

    Publication Year: 2011 , Page(s): 557 - 569
    Save to Project icon | Request Permissions | PDF file iconPDF (143 KB)  
    Freely Available from IEEE
  • IEEE Transactions on Device and Materials Reliability information for authors

    Publication Year: 2011 , Page(s): C3
    Save to Project icon | Request Permissions | PDF file iconPDF (29 KB)  
    Freely Available from IEEE
  • Blank page [back cover]

    Publication Year: 2011 , Page(s): C4
    Save to Project icon | Request Permissions | PDF file iconPDF (5 KB)  
    Freely Available from IEEE

Aims & Scope

IEEE Transactions on Device and Materials Reliability is published quarterly. It provides leading edge information that is critical to the creation of reliable electronic devices and materials, and a focus for interdisciplinary communication in the state of the art of reliability of electronic devices, and the materials used in their manufacture. It focuses on the reliability of electronic, optical, and magnetic devices, and microsystems; the materials and processes used in the manufacture of these devices; and the interfaces and surfaces of these materials.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief
Anthony S. Oates
Taiwan Semiconductor Mfg Co.