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Solid-State Circuits, IEEE Journal of

Issue 10 • Date Oct 1993

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Displaying Results 1 - 12 of 12
  • Comments on `Totally self-checking CMOS circuit design for breaks and stuck-on faults'

    Publication Year: 1993 , Page(s): 1056 - 1057
    Cited by:  Papers (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (132 KB)  

    The commenters argue that in the above-titled paper by M.S. Cheema and P.K. Lala (ibid., vol.27, no.8, p.1203-6, Aug. 1992) a reference has been wrongly interpreted by the authors, resulting in an incorrect impression of the defect densities. Another problem, concerning the propagation of faults to the final outputs, is also discussed. Furthermore, the commenter points out that the dynamic behavior of the method is not addressed in the original paper and that the design technique presented in the paper requires a high area overhead with which not all possible defects will be detected View full abstract»

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  • A complete 400-Mb/s burst-mode data OEIC receiver

    Publication Year: 1993 , Page(s): 1018 - 1022
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (512 KB)  

    A fully integrated burst-mode GaAs MESFET optoelectronic integrated circuit (OEIC) receiver, 215 mil×109 mil, that has been designed and implemented for point-to-point data links for application as a phased-array antenna controller is described. The chip provides a low-cost means for passing 400-Mb/s antenna control information using fiber optics with a very low bit-error rate (BER). Approximately 350 source-coupled FET logic gates are present on the chip. A new data coding and timing recovery scheme that is highly tolerant to jitter over a wide bandwidth has been developed. The OEIC uses an on-chip metal-semiconductor-metal (MSM) photodiode with 0.12-A/W responsivity measured at 780 nm and was fabricated in a 1.0-mm GaAs MESFET manufacturing technology. The low capacitance semi-insulating GaAs substrate minimizes the coupling between analog and digital circuitry. The circuit operates from a single 5-V supply, consumes 1 W of power, and provides an 8-b CMOS output bus together with various utility flags. Optical sensitivity is estimated at -20 dBm for 10-14 BER View full abstract»

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  • A high-performance GaAs pin electronics circuit for automatic test equipment

    Publication Year: 1993 , Page(s): 1023 - 1029
    Cited by:  Papers (5)  |  Patents (4)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (608 KB)  

    A GaAs MESFET pin electronics circuit suitable for automated test equipment (ATE) has been designed and tested. A driver, window comparator, and programmable load have been integrated on a single chip. The driver has a variable amplitude of 0 to 7 V, a variable rise/fall time of 250 ps to 5 ns, and a 50-Ω output impedance. The driver has a real-time high-impedance inhibit mode that disconnects and reconnects on the fly at rates equal to the data rate, which is greater than 1 Gb/s. Additionally, the voltage compliance of the driver in inhibit mode exceeds the high and low output levels by any amount within the -4-V to 7-V compliance window. Pattern dependent delay is typically ±50 ps. The two comparators operate over the same compliance window with a dispersion in propagation delay of less than 100 ps for an overdrive of greater than 100 mV. The comparators have a high input impedance, low bias current, and show no evidence of oscillation when being overdriven by slow dV/dt input signals. The programmable load provides a sinking capability of greater than 50 mA over the compliance range View full abstract»

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  • A unique MMIC broadband power amplifier approach

    Publication Year: 1993 , Page(s): 1005 - 1010
    Cited by:  Papers (6)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (376 KB)  

    A broadband monolithic microwave integrated circuit (MMIC) power amplifier design approach is described using lossy matching networks in the form of a bridged-T all-pass network. This approach offers the advantage of exceptional gain flatness, good input VSWR, high efficiency, and small size. A two-stage amplifier is described that delivers power greater than 1 W across the 2 to 6-GHz range with a linear gain of 20 dB, an input VSWR better than 1.7:1, and a power-added efficiency of 30% to 37% with a chip area less than 4.4 mm2 View full abstract»

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  • Low-voltage low-power controllable preamplifier for electret microphones

    Publication Year: 1993 , Page(s): 1052 - 1055
    Cited by:  Papers (10)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (264 KB)  

    A low-voltage low-power analog controllable preamplifier for electret microphones is discussed. It has been designed for a single supply voltage of 1.0 V, whereas its average power consumption amounts to some tens of microwatts. A DC current controls its gain directly into decibels. The design meets specifications concerning accuracy, bandwidth, and noise properties suitable for most applications in portable telephone equipment, portable transceivers, and hearing aids. Much attention has been paid to the dynamic range of the input signal, noise, and offset properties. The circuit has been realized in a semicustom IC process. Simulation and measurement data of the most important properties are presented View full abstract»

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  • 110-120-GHz monolithic low-noise amplifiers

    Publication Year: 1993 , Page(s): 988 - 993
    Cited by:  Papers (10)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (572 KB)  

    The authors discuss the development of 110-120-GHz monolithic low-noise amplifiers (LNAs) using 0.1-mm pseudomorphic AlGaAs/InGaAs/GaAs low-noise HEMT technology. Two 2-stage LNAs have been designed, fabricated, and tested. The first amplifier demonstrates a gain of 12 dB at 112 to 115 GHz with a noise figure of 6.3 dB when biased for high gain, and a noise figure of 5.5 dB is achieved with an associated gain of 10 dB at 113 GHz when biased for low-noise figure. The other amplifier has a measured small-signal gain of 19.6 dB at 110 GHz with a noise figure of 3.9 dB. A noise figure of 3.4 dB with 15.6-dB associated gain was obtained at 113 GHz. The authors state that the small-signal gain and noise figure performance for the second LNA are the best results ever achieved for a two-stage HEMT amplifier at this frequency band View full abstract»

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  • Ultralow-power GaAs MESFET MSI circuits using two-phase dynamic FET logic

    Publication Year: 1993 , Page(s): 1038 - 1045
    Cited by:  Papers (14)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (680 KB)  

    Two-phase dynamic FET logic (TDFL) gates are used in GaAs MESFET MSI circuits to implement very low power 4-b ripple carry adders and a variable modulus (2 to 31) prescaler. Operation of the adders is demonstrated at 500 MHz with an associated power dissipation of less than 1.0 mW and at 750 MHz with Pd=1.7 mW. The prescaler, which contains 166 TDFL gates and 79 static gates, is shown to operate up to 850 MHz with an associated power dissipation of 9.2 mW from its 1.0-V supply. The operation of the adders and prescalers demonstrates the use of three- and four-input TDFL gates and a completely dynamic TDFL XNOR gate. The TDFL gates in these circuits dissipate only from 14 to 20 nW/MHz View full abstract»

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  • Integrated complementary HBT microwave push-pull and Darlington amplifiers with p-n-p active loads

    Publication Year: 1993 , Page(s): 1011 - 1017
    Cited by:  Papers (11)  |  Patents (3)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (676 KB)  

    The authors report the microwave results of complementary heterojunction bipolar transistor (HBT) amplifiers that integrate both n-p-n and p-n-p devices on the same chip using selective molecular beam epitaxy (MBE). An HBT wideband amplifier utilizing the Darlington configuration and implementing a p-n-p active load has a gain of 7.5 dB and a bandwidth from DC to 2.5 GHz. A complementary push-pull amplifier has a saturated output power of 7.5 dBm at 2.5 GHz View full abstract»

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  • A highly integrated wideband millimeter-wave MMIC converter using 0.25-μm P-HEMT technology

    Publication Year: 1993 , Page(s): 1001 - 1004
    Cited by:  Papers (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (268 KB)  

    A highly integrated wideband converter that was designed to upconvert the entire 6- to 18-GHz input RF frequency band to a 22-GHz intermediate frequency using a 28- to 40-GHz local oscillator (LO) is described. The circuit was designed using 0.25-μm pseudomorphic HEMT technology. The converter incorporates a three-stage RF amplifier, a three-stage LO amplifier, and an active balanced mixer, all integrated on a chip 96 mil×96 mil in size. The upconverter monolithic microwave integrated circuit (MMIC) has an average of 10-dB conversion gain across the full 6-18-GHz input band View full abstract»

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  • Gallium-arsenide process evaluation based on a RISC microprocessor example

    Publication Year: 1993 , Page(s): 1030 - 1037
    Cited by:  Papers (7)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (808 KB)  

    The authors evaluate the features of a gallium-arsenide E/D MESFET process in which a 32-b RISC microprocessor was implemented. The design methodology and architecture of this prototype CPU are described. The performance sensitivities of the microprocessor and other large circuit blocks to different process parameters are analyzed, and recommendations for future process features, circuit approaches, and layout styles are made. These recommendations are reflected in the design of a second microprocessor using a more advanced process that achieves much higher density and performance View full abstract»

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  • A 1.9-GHz-band GaAs direct-quadrature modulator IC with a phase shifter

    Publication Year: 1993 , Page(s): 994 - 1000
    Cited by:  Papers (20)  |  Patents (3)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (640 KB)  

    A 1.9-GHz-band direct-quadrature modulator IC has been successfully developed for digital portable telephone use. In the 1.9-GHz high-frequency band, both image and carrier rejections as low as -40 dBc have been obtained with a low-power dissipation of 110 mW at a single power supply of 3.1 V, corresponding to a phase error below 1.1. In order to reduce undesired sideband spectral components required for digital modulation, a newly developed circuit configuration that combines a quadrature phase shifter with drivers for amplitude imbalance compensation and makes spectrum efficiency and low-power dissipation possible is used. The modulator IC may be used in enhanced digital mobile radiocommunication systems such as digital portable telephones View full abstract»

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  • A 20-Gb/s flip-flop circuit using direct-coupled FET logic

    Publication Year: 1993 , Page(s): 1046 - 1051
    Cited by:  Papers (4)  |  Patents (3)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (616 KB)  

    A new type of direct-coupled FET logic (DCFL) flip-flop called the memory cell type flip-flop (MCFF) is presented. The MCFF operates faster than conventional DCFL flip-flops and enhances the DCFL's advantages, such as low power consumption and high packing density. A D-flip-flop IC and a 1/8 divider IC were developed using the MCFF. These ICs were fabricated using 0.2-μm-gate pseudomorphic inverted HEMTs. The D-flip-flop IC is confirmed to operate up to 20 Gb/s. The 1/8 divider is toggled up to a maximum frequency of 25 GHz. These results prove that the MCFF enables DCFL circuits applicable not only to large-scale integration but to small-scale and medium-scale integration operating up to 20 Gb/s as well View full abstract»

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Aims & Scope

The IEEE Journal of Solid-State Circuits publishes papers each month in the broad area of solid-state circuits with particular emphasis on transistor-level design of integrated circuits.

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Meet Our Editors

Editor-in-Chief
Michael Flynn
University of Michigan