By Topic

IEEE Design & Test of Computers

Issue 5 • Date Sept.-Oct. 2011

Filter Results

Displaying Results 1 - 24 of 24
  • [Front cover]

    Publication Year: 2011, Page(s): c1
    Request permission for commercial reuse | PDF file iconPDF (979 KB)
    Freely Available from IEEE
  • Front Covers 
  • Table of Contents

    Publication Year: 2011, Page(s): c2
    Request permission for commercial reuse | PDF file iconPDF (87 KB)
    Freely Available from IEEE
  • Contents

    Publication Year: 2011, Page(s): 1
    Request permission for commercial reuse | PDF file iconPDF (470 KB)
    Freely Available from IEEE
  • Asynchronous Design: Distant Dream or Reality?

    Publication Year: 2011, Page(s): 2
    Request permission for commercial reuse | PDF file iconPDF (135 KB) | HTML iconHTML
    Freely Available from IEEE
  • [Masthead]

    Publication Year: 2011, Page(s): 3
    Request permission for commercial reuse | PDF file iconPDF (52 KB)
    Freely Available from IEEE
  • Guest Editors' Introduction: Asynchronous Design Is Here to Stay (and Is More Mainstream Than You Thought)

    Publication Year: 2011, Page(s):4 - 6
    Request permission for commercial reuse | PDF file iconPDF (424 KB) | HTML iconHTML
    Freely Available from IEEE
  • Call for Papers

    Publication Year: 2011, Page(s): 7
    Request permission for commercial reuse | PDF file iconPDF (44 KB)
    Freely Available from IEEE
  • High-Performance Asynchronous Pipelines: An Overview

    Publication Year: 2011, Page(s):8 - 22
    Cited by:  Papers (22)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (615 KB) | HTML iconHTML

    Pipelining is a key element of high-performance design. Distributed synchronization is at the same time one of the key strengths and one of the major difficulties of asynchronous pipelining. It automatically provides elasticity and on-demand power consumption. This tutorial provides an overview of the best-in-class asynchronous pipelining methods that can be used to fully exploit the advantages of... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Metastability and Synchronizers: A Tutorial

    Publication Year: 2011, Page(s):23 - 35
    Cited by:  Papers (33)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (645 KB) | HTML iconHTML

    Metastability can arise whenever a signal is sampled close to a transition, leading to indecision as to its correct value. Synchronizer circuits, which guard against metastability, are becoming ubiquitous with the proliferation of timing domains on a chip. Despite the critical importance of reliable synchronization, this topic remains inadequately understood. This tutorial provides a glimpse into ... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Proteus: An ASIC Flow for GHz Asynchronous Designs

    Publication Year: 2011, Page(s):36 - 51
    Cited by:  Papers (24)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2030 KB) | HTML iconHTML

    Editors' note:The high-performance benefits of asynchronous design have hitherto been obtained only using full-custom design. This article presents an industrial-strength asynchronous ASIC CAD flow that enables the automatic synthesis and physical design of high-level specifications into GHz silicon, greatly reducing design time and enabling far wider use of asynchronous technology. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • An Evaluation of Asynchronous Stacks

    Publication Year: 2011, Page(s):52 - 61
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (755 KB) | HTML iconHTML

    This article presents a case study of a fast and energy-efficient hardware implementation of a stack. The design is highly scalable, as its cycle time remains unchanged and energy per operation grows very slowly, with an increase in the number of storage locations. This design example demonstrates two often-claimed benefits of asynchronous circuit design: the potential for high average-case perfor... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • A Robust Architectural Approach for Cryptographic Algorithms Using GALS Pipelines

    Publication Year: 2011, Page(s):62 - 71
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1034 KB) | HTML iconHTML

    This article presents the design of a cryptographic chip using a globally asynchronous, locally synchronous (GALS) design methodology. The design demonstrates the key advantage of using asynchrony in cryptography: the randomization of event timing internal to the chip leads to a dramatic increase in its robustness to side-channel attacks based on power and electromagnetic emission signatures. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Asynchrony in Quantum-Dot Cellular Automata Nanocomputation: Elixir or Poison?

    Publication Year: 2011, Page(s):72 - 83
    Cited by:  Papers (11)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1155 KB) | HTML iconHTML

    Emerging computing technologies inherently exhibit high process and timing variation. Many researchers believe that an asynchronous approach is likely to play an enabling role in making these technologies feasible. This article compares the cost and performance of fully synchronous and mixed synchronous asynchronous implementations of quantum cellular automata, and makes the case that asynchrony i... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Bringing Robustness and Power Efficiency to Autonomous Energy-Harvesting Microsystems

    Publication Year: 2011, Page(s):84 - 94
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1044 KB) | HTML iconHTML

    Asynchronous circuits are well-suited to ultra-low-power design. This article presents a microsystem that is powered only by energy extracted from the environment to implement an autonomous sensing application. Key to this application is the use of asynchronous logic, which not only provides greater energy efficiency due to its event-driven nature but, more importantly, allows graceful adaptation ... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Conference Reports

    Publication Year: 2011, Page(s): 95
    Request permission for commercial reuse | PDF file iconPDF (663 KB) | HTML iconHTML
    Freely Available from IEEE
  • Can We Trust the Chips of the Future?

    Publication Year: 2011, Page(s):96 - 103
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (135 KB) | HTML iconHTML

    This roundtable is based on the topic of hardware security and trust, which was the focus of the IEEE International Symposium on Hardware-Oriented Security and Trust (HOST 2011) held with the 2011 Design Automation Conference. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Roadmapping Power

    Publication Year: 2011, Page(s):104 - 106
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (706 KB) | HTML iconHTML

    How will today's technology advance to the enablement of hundreds of teraoperations per square centimeter of silicon, and hundreds of terabits per second transmitted both intra- and inter-chip, delivering the desired user experiences while always staying within market-determined power limits? This is where a "power roadmap" comes into play, bringing issues that are examined in this column. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Explicit and Implicit Contributions to Standards Groups

    Publication Year: 2011, Page(s):107 - 109
    Request permission for commercial reuse | PDF file iconPDF (110 KB)
    Freely Available from IEEE
  • Learning and Practice of the Property Specification Language

    Publication Year: 2011, Page(s):110 - 111
    Request permission for commercial reuse | PDF file iconPDF (141 KB) | HTML iconHTML
    Freely Available from IEEE
  • CEDA Currents

    Publication Year: 2011, Page(s):112 - 113
    Request permission for commercial reuse | PDF file iconPDF (79 KB)
    Freely Available from IEEE
  • Test Technology TC Newsletter

    Publication Year: 2011, Page(s):114 - 115
    Request permission for commercial reuse | PDF file iconPDF (662 KB)
    Freely Available from IEEE
  • Asynchronous FUD

    Publication Year: 2011, Page(s): 116
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (66 KB) | HTML iconHTML

    The one problem yet to be adequately solved in the growing asynchronous community is the synchronous design industry momentum, which has proven hard to redirect to include asynchronous options. This column examines some of the reasons why. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • [Advertisement - Back cover]

    Publication Year: 2011, Page(s): c3
    Request permission for commercial reuse | PDF file iconPDF (2215 KB)
    Freely Available from IEEE
  • [Advertisement - Back cover]

    Publication Year: 2011, Page(s): c4
    Request permission for commercial reuse | PDF file iconPDF (2142 KB)
    Freely Available from IEEE

Aims & Scope

This Periodical ceased production in 2012. The current retitled publication is IEEE Design & Test.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief
Krishnendu Chakrabarty