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Microwave Theory and Techniques, IEEE Transactions on

Issue 8 • Date Aug. 2011

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Displaying Results 1 - 25 of 34
  • Table of contents

    Page(s): C1 - C4
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  • IEEE Transactions on Microwave Theory and Techniques publication information

    Page(s): C2
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  • Relation Between Reflection Phase and Surface-Wave Bandgap in Artificial Magnetic Conductors

    Page(s): 1901 - 1908
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    The relationship between the phase of the reflection coefficient and the surface-wave bandgap in planar artificial magnetic conductors (AMCs) is investigated. The periodic surface of the AMC is modeled as a surface impedance and the plane-wave reflection coefficients and the supported surface waves are obtained by this model. Next, the connection between the phase of the reflection coefficient in the fast-wave region and the occurrence of bandgap in the slow-wave region is demonstrated. Theoretical results are verified numerically for two typical AMCs. View full abstract»

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  • Inductance Calculations for Plane-Pair Area Fills With Vias in a Power Distribution Network Using a Cavity Model and Partial Inductances

    Page(s): 1909 - 1924
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    Partial inductances are computed herein for the via transitions between parallel planes. A hybrid method proposed for the inductance calculation correlates the definition of the partial inductance and a resonant cavity model. The hybrid method is corroborated by comparison with the partial-element equivalent-circuit and the cavity methods, as well as measurements. The portions of the plane net and via net inductances are quantified, and the contribution of each plane current to the plane net inductance is quantitatively analyzed. View full abstract»

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  • Very Compact and Low-Profile LTCC Unbalanced-to-Balanced Filters With Hybrid Resonators

    Page(s): 1925 - 1936
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    In this paper, two design approaches are presented for realizing very compact and low-profile unbalanced-balanced filters with special configuration called hybrid resonators. One of the design concepts for the unbalanced-balanced filter is based on the folded hybrid resonators. This filter consists of two hybrid resonators, which are folded face to face symmetrically. The capacitance between two resonators is generated by folding the resonators. This approach makes design of compact and low-profile filters possible. The other design concept for the unbalanced-balanced filter consists of resonators that have capacitive and inductive inverters. The feature of this filter is that phase-lag is expressed by inductive coupling. This filter also achieves very low profile and compact size. The dimensions of the two filters fabricated by low temperature co-fired ceramic are 1.6 mm × 1.05 mm × 0.67 mm and 1.6 mm × 0.8 mm × 0.56 mm, respectively. For the simulation results, the maximum insertion losses for the first and second filters are 2.2 and 2.3 dB in the 2.4-GHz band, respectively. Common mode rejection for both is more than 22 dB in the same band. The amplitude imbalance and phase imbalance for the first filter are less than 1.8 dB and 6.8° in the passband, respectively. The amplitude imbalance and phase imbalance for the second filter are less than 1.9 dB and 1.8° in the passband, respectively. For both design methods, good agreement between measured and computed results is obtained. View full abstract»

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  • Microstrip Dual/Quad-Band Filters With Coupled Lines and Quasi-Lumped Impedance Inverters Based on Parallel-Path Transmission

    Page(s): 1937 - 1946
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    Microstrip quad-band bandpass filters with controllable passband center frequencies are presented and intensively investigated in this study. The newly proposed quad-band filter principally comprises two dual-band filters. Specifically, the two distinct types of dual-band filters with different dual-band generating mechanisms are studied and then combined to provide the quad-band responses. By incorporating parallel coupled lines as input sections and interstage impedance inverters built with quasi-lumped inductors, the type-I filter is constructed with thorough network analysis. As for the type-II filter, with novel quad-pole-splitting techniques analyzed by mixed-mode S-parameters, dual passbands of close band proximity could be realized. Eventually, based on the parallel-path transmission theory along with the two dual-band filters, a novel quad-band filter is thus implemented. The measurement and simulation results show good agreement. View full abstract»

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  • Mode Symmetry Analysis and Design of CMOS Synthetic Coupled Transmission Lines

    Page(s): 1947 - 1954
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    This paper presents the mode symmetry analysis and design of CMOS synthetic coupled lines that are meandered for the miniaturization design. The conventional even-odd mode analysis is not appropriate to apply due to the meandering structure, which is asymmetric. The asymmetric coupled-line model is therefore adopted for analyses and the equivalent model parameters are extracted based on ABCD-parameters converted from scattering parameters. The proposed extraction procedure is then applied on a 3-dB directional coupler as a design example. The results quantitatively show that symmetry of the coupled lines is well maintained. Symmetry of other coupled-line structures that degrade coupled-line symmetry, such as loosely coupled lines and different bend direction, are also analyzed based on this model. Finally, an equal-length bend design suitable for the CMOS synthetic coupled lines is proposed and has managed to improve symmetry on various structures. View full abstract»

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  • Design of Unequal Dual-Band Gysel Power Divider With Arbitrary Termination Resistance

    Page(s): 1955 - 1962
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    This paper presents an exact closed-form design method for dual-band unequal Gysel power divider with arbitrary termination resistance. To obtain the unequal property, branch lines with different characteristic impedances attached to a short-circuit terminated stub and an open-circuit terminated stub are needed. Arbitrary termination resistance matching can be achieved without additional output transformers. Line impedance analysis shows the proposed structure can support large power-dividing ratio (up to 6) with wide frequency ratio range (1.5-2.4). Power operation analysis shows that it maintains Gysel divider's high power-handling advantage over Wilkinson divider. View full abstract»

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  • On-Chip Slot-Ring and High-Gain Horn Antennas for Millimeter-Wave Wafer-Scale Silicon Systems

    Page(s): 1963 - 1972
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    This paper presents on-chip slot-ring and horn antennas for wafer-scale silicon systems. A high efficiency is achieved using a 100-μm quartz superstrate on top of the silicon chip, and a low-loss microstrip transformer using the silicon back-end metallization. A finite ground plane is also used to reduce the power coupled to the TEM mode. The slot-ring and 1-λ02 horn achieve a measured gain of 0-2 and 6-8 dBi at 90-96 GHz, respectively, and a radiation efficiency of ~50%. The horns achieve a high antenna gain without occupying a large area on the silicon wafer, thus resulting in a low-cost system. The designs are compatible with either single- or two-antenna transceivers, or with wafer-scale imaging systems and power-combining arrays. View full abstract»

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  • Direct Extraction Method of HBT Equivalent-Circuit Elements Relying Exclusively on S -Parameters Measured at Normal Bias Conditions

    Page(s): 1973 - 1982
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    A new direct parameter-extraction scheme applied to a heterojunction bipolar transistor (HBT) small-signal equivalent circuit with distributed base-collector junction capacitance is presented. The proposed method relies exclusively on S -parameters measured at low and high frequencies in normal bias conditions, and without using approximations based on anticipated values. The extraction results obtained from low-frequency modeling allow the extraction of the parasitic inductances at high frequency. This is performed by formulating expressions based on ac-current-source consideration different from the previously published one, without affecting the physical signification of the HBT model. This method presents a simple way for the extraction of the model parameters directly. An experimental validation on an InP double HBT device was carried out, using the S -parameters measured in a frequency range of 40 MHz-50 GHz over a wide range of bias points. The modeling results are presented, showing that the proposed method can yield a good fit between measured and calculated S-parameters. View full abstract»

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  • Characterization of the Noise Parameters of SiGe HBTs in the 70–170-GHz Range

    Page(s): 1983 - 2000
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    Noise parameter (Fmin, Zopt, and R n) measurements of SiGe HBTs are provided for the first time in the 70-170-GHz range. In the W-band, this is accomplished by integrating on a single chip a source impedance tuner with the device-under-test and a low-noise amplifier with 3.8-dB noise figure. Noise-figure measurements were performed over multiple source impedances using a commercial single-sideband downconverter. In the D -band, where off-chip setup losses are overwhelming, the source impedance tuner, the transistor under test, and the entire receiver with a noise figure of 10 dB were integrated on a single silicon die, and direct noise-figure measurements were conducted first on the test setup with the transistor under test, and next on the reference receiver without the test transistor. Both analog and digital source impedance tuners, based on n-MOSFET variable resistors, n-MOSFET switches, and accumulation-mode varactors, have been designed and characterized. Finally, the existing technique to extract the SiGe HBT noise parameters from Y -parameter measurements, without any noise-figure measurements, is refined to include noise correlation and is validated up to 170 GHz. The measured source-pull and Y -parameters results show that the minimum noise figure of state-of-the-art SiGe HBTs remains below 5 dB throughout the D-band. View full abstract»

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  • Reliability Investigation of Photoconductive Continuous-Wave Terahertz Emitters

    Page(s): 2001 - 2007
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    The lifetime of photomixers depends significantly on the operation conditions. High values of bias voltage and/or optical power increase the emitted terahertz power, but considerably decrease the operation lifetime. Interdigitated finger photomixers especially face the problem of thermal destruction due to high current densities. We present an Arrhenius analysis of low-temperature-grown-GaAs photomixers and link the photomixer lifetime to the accessible signal-to-noise ratio (SNR). With a coherent continuous-wave terahertz system designed for 1000 operating hours, we achieve an SNR of 30 dB at 1 THz using an integration time of 500 ms. View full abstract»

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  • A 20/40-GHz Dual-Band Voltage-Controlled Frequency Source in 0.13- \mu{\hbox {m}} CMOS

    Page(s): 2008 - 2016
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    An LC-type voltage-controlled oscillator (VCO) and a push-push frequency doubler are presented for 20/40-GHz dual-band design in standard 0.13-μm CMOS. Combining the varactor with the transconductance-tuned regime, the VCO is realized to arrive at the range extension for high-frequency operation. In addition, a technique using sensitivity distribution is adopted to achieve linear tuning range. The VCO provides the tuning range of 19.8-22.6 GHz, and the measured phase noise at 21.2-GHz frequency is -105.7 dBc/Hz at a 1-MHz offset. The doubler following the VCO can provide twice the frequency over the tuning range and generate output with better fundamental rejection resulting from the notch characteristic. The measured phase noise of the doubler at 42.4-GHz frequency is -94.6 dBc/Hz at a 1-MHz offset while dissipating 8 mW in the whole circuit. View full abstract»

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  • Optimized Transistor Output Power—Extending Cripps' Loadline Method to Cascode Stages

    Page(s): 2017 - 2023
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    A method for analytical optimization of maximum distortionless output power in a class-A amplifier stage is presented. This method is based on Brown's ideas to optimize the load resistance of triode vacuum tubes and Cripps' loadline method. As a result, the maximum distortionless output power of a cascode stage can be directly calculated as a function of load impedance. The theoretical approach is demonstrated with the design of a 61.5-GHz low-noise amplifier involving a cascode stage as output stage. View full abstract»

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  • Analysis of High-Efficiency Power Amplifier Using Second Harmonic Manipulation: Inverse Class-F/J Amplifiers

    Page(s): 2024 - 2036
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    In this paper, an analysis of a power amplifier manipulated using a second harmonic (PA-2HM) is described using a remarkable correlation between the fundamental and second harmonic impedances. The output loading condition, made up of an optimum fundamental impedance mapped to the conditional second harmonic reactance, allows us to achieve a high-efficiency power amplifier (PA) with a simple output matching circuit. For the analysis, the output voltage and current waveforms are modeled in terms of their output loading in order to extend the output power and efficiency. Specific PA-2HM cases, inverse Class-F and Class-J modes, are analyzed using different second harmonic reactance conditions. The allowable second harmonic reactance for maintaining maximum efficiency has been found to be spread throughout a wide range. To justify the analysis, a harmonic load-pull simulation and measurement are conducted and compared with analysis results. For verification, a commercially available 60-W gallium-nitride (GaN) device was used for different types of PA (inverse Class-F and Class-J) with appropriate second harmonic impedance. In terms of the output power and drain efficiency, the measured results are in good agreement with not only computer-aided design simulations, but also with our analysis and load-pull results. View full abstract»

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  • Analysis of High-Efficiency Power Amplifiers With Arbitrary Output Harmonic Terminations

    Page(s): 2037 - 2048
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    This paper presents an analysis of ideal power amplifier (PA) efficiency maximization subject to a finite set of arbitrary complex harmonic terminations, extending previous results where only purely reactive harmonic terminations were treated. Maximum efficiency and corresponding fundamental output power and load impedance are analyzed as a function of harmonic termination(s). For a PA restricted to second harmonic drain waveform shaping, maximum efficiency as a function of second harmonic termination is treated for cases of both purely real and complex fundamental frequency impedances. For the case of a PA restricted to second and third harmonic drain waveform shaping, peak efficiency as a function of third harmonic impedance with an ideal second harmonic termination is analyzed. Additionally, the sensitivity of PA efficiency with respect to the magnitude and phase of the second and third harmonic load reflection coefficients is examined. The analysis is extended to include device and package parasitics. The paper concludes with a discussion of how the presented general analysis method provides useful insights to the PA designer. View full abstract»

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  • Saturated Power Amplifier Optimized for Efficiency Using Self-Generated Harmonic Current and Voltage

    Page(s): 2049 - 2058
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    A saturated power amplifier (PA) optimized for efficiency is described. As a PA is driven into saturated operation, the current source of the device generates a large third harmonic current, which creates a quasi-rectangular current waveform. The large nonlinear output capacitor of the transistor generates a second harmonic voltage with a very small third harmonic component. The second harmonic voltage is in-phase with the fundamental voltage, making a half-sine wave voltage waveform with voltage peaking. These waveforms are similar to those of a class F-1 . The fundamental load at the intrinsic device is resistive with the output capacitance tuned out, which is identical to the class F-1 case. However, the required harmonic impedances are just larger than the impedance levels of the output capacitance for both the second and third harmonics. Therefore, the circuit topology is similar to that of a class E amplifier, which is very simple. The PA implemented using a GaN HEMT delivers the expected good performance using the simple circuit topology. View full abstract»

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  • Two-Stage High-Gain High-Power Distributed Amplifier Using Dual-Gate GaN HEMTs

    Page(s): 2059 - 2063
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    A two-stage distributed amplifier monolithic microwave integrated circuit (MMIC) has been designed and fabricated using dual-gate GaN HEMTs. The measured small-signal gain of the MMIC is about 20 dB over the frequency range of 2-18 GHz. Measured peak saturated output power is about 2 W. A low interstage impedance of 25 Ω is chosen for two reasons. It leads to larger size of the HEMTs in the output stage, and hence, increases output power without reducing the bandwidth. It also keeps the inter-stage transmission lines short, and hence, results in a very compact two-stage design with high gain. To enhance the output power further, capacitive division technique is used in the second stage. Dual-gate HEMTs are used, as they are compact and provide superior performance when compared to standard HEMTs. View full abstract»

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  • A High-Linearity X -Band Four-Element Phased-Array Receiver: CMOS Chip and Packaging

    Page(s): 2064 - 2072
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    This paper presents the design and chip-on-board packaging of a high-linearity four-element phased-array receiver for 9-10-GHz applications. The phased-array is built using 0.13-μm CMOS with a single-ended design, and it results in a measured gain of 10.1 dB, an input P1dB of - 12.5dBm, an input IP3 of -4 dBm, and a noise figure of 3.4 dB at 9.5 GHz. An rms gain error of <;0.4 dB and phase error of <;8° are obtained at 9-10 GHz using an integrated variable gain amplifier and an 11° phase trim bit. The chip occupies an area of 2.5 × 2.9 mm2 with a power consumption of 36 mW per channel from a 1.8-V supply (144-mW total). The phased array is packaged using chip-on-board techniques and the channel-to-channel coupling is determined either by the chip-to-ground inductance or by coupling between the input bond-wires. Measurements and simulations on channel 1 show that, with well isolated input bond-wires, one can obtain <; -31-dB coupling between the channels, and an rms amplitude and phase error of ~0.2 dB and ~1°, respectively, at 9.5 GHz, when the phase of channels 2-4 are changed. To our knowledge, this is the first in-depth study of coupling in a phased-array chip with packaging considerations. View full abstract»

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  • Systematic Approach to the Stabilization of Multitransistor Circuits

    Page(s): 2073 - 2082
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    This paper proposes a systematic approach for the elimination of spurious oscillations in circuits with multiple active elements. The procedure is based on detecting the sensitive parts (nodes or branches) of the complex circuit at which we can have a strong control of the dynamics responsible for the instability. To do so, stability analyses based on pole-zero identification are performed at multiple observation ports. Once sensitive locations are detected, stabilization is achieved by adding series or shunt stabilization networks at the suitable node or branch. Standard techniques from linear control theory (pole placement strategies) are used to automatically calculate the values of the stabilization elements ensuring circuit stability. Here, the methodology is applied to the stabilization of a two-stage Ku-band high-power amplifier for active antenna space applications. View full abstract»

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  • A Polar Transmitter Using Interleaving Pulse Modulation for Multimode Handsets

    Page(s): 2083 - 2090
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    This paper presents a highly efficient polar transmitter using interleaving pulse modulation for multiple communication standards. Using the proposed interleaving pulse modulation technique, a polar transmitter can suppress the odd-order output spurs deeply with a feasible value of essential sampling frequency and keep the residual spurs from falling into the receive bands. To validate the proposed technique, a prototype polar transmitter was constructed and evaluated. Using global system for mobile communications, enhanced data rates for GSM evolution, and wideband code division multiple access (WCDMA) signals at 836.5 MHz, the polar transmitter achieved 68%, 45.5%, and 41.2% power-added efficiency at output power levels of 28, 26, and 25 dBm, respectively. The measurement results were able to pass the spectral requirements defined by the respective standards without the use of any pre-distortion or calibration techniques. Moreover, the polar transmitter was able to achieve an output dynamic range of 80 dB required by the WCDMA standard. View full abstract»

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  • Ku -Band Image Rejection Sliding-IF Transmitter in 0.13- \mu{\hbox {m}} CMOS Process

    Page(s): 2091 - 2107
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    The insensitivity to gain and phase mismatches is investigated in a multiband double image rejection transmitter (DIRT). Although a direct in-phase/quadrature (I/Q) modulator architecture is simple, the I/Q gain and phase mismatches directly affect the image rejection ratio (IRR) over the operating frequencies. However, the DIRT has low sensitivity to a small I/Q phase mismatch, while the IRR is predominantly dependent on the IF gain mismatch. Furthermore, there is a region of insensitivity to both gain and phase mismatches in the DIRT. To characterize the mismatch effects of the DIRT, the IRR is theoretically analyzed and simulated at the system level. The proposed DIRT with sliding-IF is implemented on a 0.13-μm CMOS process to prove the insensitivity to the I/Q mismatch effects over 11-15-GHz multiband frequency ranges. For supporting the multiband functionality, frequency dividers-by-4/8/16 are utilized to generate 0.675-, 1.35-, and 2.7-GHz quadrature IF LO signals using 10.8-GHz RF local oscillator (LO) signal. The measurement results show that the in-band image rejection and LO leakage suppression are greater than 48.8 and 43.5 dBc, respectively, over the wideband frequency range. The output referred 1-dB compression point is obtained as high as - 4 dBm with a 1.5-V power supply. A multiband CMOS DIRT operating over Ku-band has not been previously reported. View full abstract»

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  • Schottky Diode Series Resistance and Thermal Resistance Extraction From S -Parameter and Temperature Controlled I–V Measurements

    Page(s): 2108 - 2116
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    A new method for extracting the series resistance and thermal resistance of a Schottky diode is presented. The method avoids the inaccuracies caused by the temperature dependence of the saturation current and ideality factor. These are a major concern for traditional extraction methods, especially when the diode under test has a submicrometer anode diameter and is significantly heated up by the bias current. The method uses theoretical models validated with measurements for the temperature-dependent saturation current and ideality factor, and the series resistance values extracted from low-frequency scattering parameter measurements in the high bias current regime. The main focus of this paper is the accurate extraction of the series resistance. For example, the series resistance value extracted with our method for a discrete diode with a 0.8-μm anode diameter is 88% larger than the series resistance extracted using traditional techniques. As a by-product from the extraction algorithm, an estimate for the thermal resistance of the diode is obtained. The method is validated with extensive current-voltage (I-V) and scattering parameter measurements of two different commercially available discrete single anode mixer diodes optimized for terahertz operation. I-V measurements are performed at several controlled ambient temperatures and scattering parameter measurements at one known ambient temperature. View full abstract»

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  • A Cryogenic Integrated Noise Calibration and Coupler Module Using a MMIC LNA

    Page(s): 2117 - 2122
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    A new cryogenic noise calibration source for radio astronomy receivers is presented. Dissipated power is only 4.2 mW, allowing it to be integrated with the cold part of the receiver. Measured long-term stability, sensitivity to bias voltages, and noise power output versus frequency are presented. The measured noise output versus frequency is compared to a warm noise diode injected into a cryogenic K-band receiver and shows the integrated noise module to have less frequency structure, which will result in more accurate astronomical flux calibrations. It is currently in operation on the new seven-element K-band focal plane array receiver on the National Radio Astronomy Observatory Robert C. Byrd Green Bank Telescope. View full abstract»

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  • A Method for Direct Impedance Measurement in Microwave and Millimeter-Wave Bands

    Page(s): 2123 - 2130
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    A novel method for direct impedance measurement using a common vector network analyzer (VNA) is introduced and experimentally verified. In commonly used methods, the input impedance or admittance of a device-under-test (DUT) is derived from the measured value of its reflection coefficient causing serious inaccuracy problems for very high and very low impedances. The proposed method makes it possible to measure a quantity that is, in the ideal case, directly proportional to the value of input impedance or admittance of the DUT, enabling accurate and stable measurement of impedances that are extremely different from the common 50-Ω reference impedance. The method can significantly reduce errors caused by the VNA. View full abstract»

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The IEEE Transactions on Microwave Theory and Techniques focuses on that part of engineering and theory associated with microwave/millimeter-wave components, devices, circuits, and systems involving the generation, modulation, demodulation, control, transmission, and detection of microwave signals. This includes scientific, technical, and industrial, activities. Microwave theory and techniques relates to electromagnetic waves usually in the frequency region between a few MHz and a THz; other spectral regions and wave types are included within the scope of the Society whenever basic microwave theory and techniques can yield useful results. Generally, this occurs in the theory of wave propagation in structures with dimensions comparable to a wavelength, and in the related techniques for analysis and design..

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