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# IEEE Transactions on Device and Materials Reliability

## Filter Results

Displaying Results 1 - 25 of 28
• ### [Front cover]

Publication Year: 2011, Page(s): C1
| PDF (104 KB)
• ### IEEE Transactions on Device and Materials Reliability publication information

Publication Year: 2011, Page(s): C2
| PDF (36 KB)

Publication Year: 2011, Page(s):205 - 206
| PDF (50 KB)
• ### Overview on ESD Protection Designs of Low-Parasitic Capacitance for RF ICs in CMOS Technologies

Publication Year: 2011, Page(s):207 - 218
Cited by:  Papers (29)
| | PDF (1339 KB) | HTML

CMOS technology has been widely used to implement radio-frequency integrated circuits (RF ICs). However, the thinner gate oxide in nanoscale CMOS technology seriously degrades the electrostatic discharge (ESD) robustness of RF ICs. Therefore, on-chip ESD protection designs must be added at all input/output pads in RF circuits against ESD damages. To minimize the impacts from ESD protection circuit... View full abstract»

• ### A Model for NBTI in Nitrided Oxide MOSFETs Which Does Not Involve Hydrogen or Diffusion

Publication Year: 2011, Page(s):219 - 226
Cited by:  Papers (13)
| | PDF (340 KB) | HTML

The negative bias temperature instability (NBTI) is, arguably, the single most important reliability problem in present day metal-oxide-silicon field-effect transistor (MOSFET) technology. This paper presents a model for the NBTI which is radically different from the quite widely utilized reaction diffusion models which dominate the current day NBTI literature. The proposed model is relevant to te... View full abstract»

• ### Comparison of the Reliability of Thin $hbox{Al}_{2} hbox{O}_{3}$ Gate Dielectrics Prepared by In Situ Oxidation of Sputtered Aluminum in Oxygen Ambient With and Without Nitric Acid Compensation

Publication Year: 2011, Page(s):227 - 235
Cited by:  Papers (8)
| | PDF (1209 KB) | HTML

The electrical characteristics and reliability of the aluminum oxide (Al2O3) metal-oxide-semiconductor (MOS) capacitors were investigated under low-temperature process consideration. The simple cost-effective technique in preparing the Al2O3/SiO2 bilayer structure as the high-k gate dielectrics was demonstrated in this paper. SiO2<... View full abstract»

• ### An Interactive Simulation Tool for Complex Multilayer Dielectric Devices

Publication Year: 2011, Page(s):236 - 243
Cited by:  Papers (17)
| | PDF (950 KB) | HTML

Novel devices incorporating multiple layers of new materials increase the complexity of device structures, particularly in field-effect transistors, capacitors, and nonvolatile memory (NVM). The mounting complexity of these devices increases the difficulty of generating energy band diagrams and performing device parameter calculations whether these calculations are done by hand, using spreadsheets... View full abstract»

• ### A Novel MONOS Memory With High-$kappa$ HfLaON as Charge-Storage Layer

Publication Year: 2011, Page(s):244 - 247
Cited by:  Papers (3)
| | PDF (294 KB) | HTML

MIS capacitors with a high-κ HfLaON or HfLaO gate dielectric are fabricated by using a reactive sputtering method to investigate the applicability of the films as a novel charge-storage layer in a metal-oxide-nitride-oxide-silicon nonvolatile memory device. Experimental results indicate that the MIS capacitor with a HfLaON gate dielectric exhibits a large memory window, high program/erase s... View full abstract»

• ### Reliability of Bulk Acoustic Wave Resonators at High Power and High Frequency

Publication Year: 2011, Page(s):248 - 253
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We present the results of high-power reliability experiments performed in AlN thin-film piezoelectric bulk-acoustic-wave resonators. The experiments show that electromigration effects damage the aluminum electrodes of the device in a few hours of input power in the range of work of these devices. We have detected that this failure is very sensitive to the frequency of the input power, and we have ... View full abstract»

• ### The Effect of SOA Enhancement on Device Ruggedness Under UIS for the LDMOSFET

Publication Year: 2011, Page(s):254 - 262
Cited by:  Papers (8)
| | PDF (912 KB) | HTML

This paper presents a unified study on the relationship between safe operating area (SOA) enhancement and unclamped inductive switching (UIS) behavior in an LDMOS. Popularized methods of SOA enhancement techniques are implemented, including a highly doped p+ bottom layer, n-adaptive layer, and drift extension. The effect that each enhancement has on SOA is first analyzed and shown, followed by the... View full abstract»

• ### Modeling Undeposited CNTs for CNTFET Operation

Publication Year: 2011, Page(s):263 - 272
Cited by:  Papers (6)
| | PDF (618 KB) | HTML

The carbon nanotube field-effect transistor (CNTFET) is a promising device to supersede the MOSFET at the end of the technology roadmap of the CMOS. When designing and manufacturing a CNTFET, additional features such as pitch, number, and position of the CNTs must be considered to assess its performance. One of the defect types that can occur when fabricating a CNTFET is the absence of some CNTs f... View full abstract»

• ### Failure Rates for Interconnect Dielectric Breakdown: Trends Determining Technology Reliability Scaling Limits

Publication Year: 2011, Page(s):273 - 277
Cited by:  Papers (3)
| | PDF (429 KB) | HTML

In this paper, the dielectric properties [dielectric constant κ and thickness d (in nanometers)] that are necessary for the reliable operation of interline dielectrics used for passivation of copper interconnects in integrated circuits are determined. By relating the field acceleration factor to the dielectric constant, the optimum dielectric properties needed for meeting industrial reliabi... View full abstract»

• ### A Comprehensive LER-Aware TDDB Lifetime Model for Advanced Cu Interconnects

Publication Year: 2011, Page(s):278 - 289
Cited by:  Papers (11)  |  Patents (2)
| | PDF (1189 KB) | HTML

A time-dependent dielectric breakdown (TDDB) lifetime model predicting the impact of line-edge roughness (LER) on Cu interconnect reliability is proposed. The structure, validity, and accuracy of the model are evaluated and discussed. The model is applied to an interconnect scaling scenario that includes conventional patterning and spacer-defined patterning of nanometer-scale Cu wires. LER-aware T... View full abstract»

• ### Time-Dependent Dielectric Breakdown and Stress-Induced Leakage Current Characteristics of 0.7-nm-EOT $hbox{HfO}_{2}$ pFETs

Publication Year: 2011, Page(s):290 - 294
Cited by:  Papers (2)
| | PDF (629 KB) | HTML

In this paper, we examine the time-dependent dielectric breakdown (TDDB) reliability of p-type field-effect transistor devices with 0.7-nm-equivalent-oxide-thickness HfO2 gate dielectric layers. The TDDB distributions indicate ten-year lifetime with operating voltages in excess of 1 V. The reason for this high reliability lies in the high Weibull slopes (~1.2) of the measured TDDB distr... View full abstract»

• ### Structural and Electronic Properties of a Mn Oxide Diffusion Barrier Layer Formed by Chemical Vapor Deposition

Publication Year: 2011, Page(s):295 - 302
Cited by:  Papers (24)  |  Patents (1)
| | PDF (601 KB) | HTML

A diffusion barrier layer of a few nanometers in thickness is required for a Cu/SiO2 interconnect structure for advanced integrated circuits (ICs). This paper reports a new barrier material and process by chemical vapor deposition (CVD) of a Mn oxide layer using a bis(ethylcyclopentadienyl)manganese precursor. A good adhesion was obtained when the MnOx layer was deposited bel... View full abstract»

• ### Failure Mechanisms in Packaged Light-Emitting Diodes Under Gamma Radiations: Piezoelectric Model Based on Stark Effect

Publication Year: 2011, Page(s):303 - 311
Cited by:  Papers (3)
| | PDF (968 KB) | HTML

Degradation of packaged light-emitting diodes (LEDs) under gamma irradiations has been investigated using usual electro-optical characterizations. Failure mechanisms have been revealed by an accurate degradation model taking into account the Stark effect in electroluminescence spectrum and piezoelectric field in the active zone. Gamma irradiations have induced an additional mechanical stress close... View full abstract»

• ### Effect of Oxygen Partial Pressure on Silver Migration of Low-Temperature Sintered Nanosilver Die-Attach Material

Publication Year: 2011, Page(s):312 - 315
Cited by:  Papers (24)
| | PDF (385 KB) | HTML

The low-temperature joining technique of silver sintering is being actively pursued in the power electronics industry as a lead-free die-attach solution for packaging power devices and modules. However, one of the concerns of this technique is the migration of silver at a high temperature. Recently, we have reported our findings of the migration of a low-temperature sintered nanosilver in dry air ... View full abstract»

• ### Migration of Sintered Nanosilver Die-Attach Material on Alumina Substrate Between 250 $^{circ}hbox{C}$ and 400 $^{ circ}hbox{C}$ in Dry Air

Publication Year: 2011, Page(s):316 - 322
Cited by:  Papers (33)
| | PDF (793 KB) | HTML

The low-temperature joining of semiconductor chips by sintering of silver paste is emerging as an alternative lead-free solution for power electronics devices and modules working in a high-temperature environment. A promising die-attachment material that would enable the rapid implementation of the sintering process is nanoscale silver paste, which can be sintered at temperatures below 300°... View full abstract»

• ### Analysis of Discharge Mechanism in HDD

Publication Year: 2011, Page(s):323 - 327
Cited by:  Papers (2)
| | PDF (741 KB) | HTML

This paper discusses a discharge mechanism between the head and disk in hard disk drive. The three phases of the discharge mechanism which depend on the voltage difference between the head and disk were observed. In phase 1, no electric discharge occurs. In phase 2, only electric discharge occurs. In phase 3, electric discharge occurs with physical contact of the head to the disk, which causes hea... View full abstract»

• ### Thermal Cycling Reliability of Lead-Free Solders (SAC305 and Sn3.5Ag) for High-Temperature Applications

Publication Year: 2011, Page(s):328 - 338
Cited by:  Papers (20)
| | PDF (1297 KB) | HTML

Applications with temperatures higher than the melting point of eutectic tin-lead solder (183°C) require high-melting-point solders. However, they are expensive and not widely available. With the adoption of lead-free legislation, first in Europe and then in many other countries, the electronics industry has transitioned from eutectic tin-lead to lead-free solders that have higher melting p... View full abstract»

• ### Effects of Curing and Chemical Aging on Warpage—Characterization and Simulation

Publication Year: 2011, Page(s):339 - 348
Cited by:  Papers (7)
| | PDF (1074 KB) | HTML

In this paper, the effect of the curing process on the warpage of an encapsulated electronic package is considered by using a coupled chemical-thermomechanical modeling methodology. A cure-dependent constitutive model that consists of a cure-kinetic model, a curing- and chemical-aging-induced shrinkage model, and a degree of cure-dependent viscoelastic relaxation model was developed and implemente... View full abstract»

• ### Design and Experimental Characterization of a New Built-In Defect-Based Testing Technique to Achieve Zero Defects in the Automotive Environment

Publication Year: 2011, Page(s):349 - 357
Cited by:  Papers (5)
| | PDF (1070 KB) | HTML

Efficient screening procedures for the control of defectivity are vital to limit early failures, particularly in critical automotive applications. Traditional strategies based on burn-in and in-line tests are able to provide the required level of reliability, but they are expensive and time consuming. This paper presents a novel built-in circuitry to screen out gate oxide and crystal-related defec... View full abstract»

• ### Estimating the Yield Strength of Thin Metal Films Through Elastic–Plastic Buckling-Induced Debonding

Publication Year: 2011, Page(s):358 - 361
| | PDF (197 KB) | HTML

In this correspondence, we propose a procedure to estimate the yield strength of thin films by debonding films from their substrate by elastic-plastic buckling under thermally induced compressive loading. The out-of-plane displacement of the metal lines under conditions of elastic-plastic buckling is dependent on the yield strength of the film. Thus, an inverse estimate of the yield strength is ma... View full abstract»

• ### 2011 International integrated reliability workshop

Publication Year: 2011, Page(s): 362
| PDF (919 KB)
• ### Special issue of materials processing and reliability of 3D interconnects

Publication Year: 2011, Page(s): 363
| PDF (99 KB)

## Aims & Scope

IEEE Transactions on Device and Materials Reliability is published quarterly. It provides leading edge information that is critical to the creation of reliable electronic devices and materials, and a focus for interdisciplinary communication in the state of the art of reliability of electronic devices, and the materials used in their manufacture. It focuses on the reliability of electronic, optical, and magnetic devices, and microsystems; the materials and processes used in the manufacture of these devices; and the interfaces and surfaces of these materials.

Full Aims & Scope

## Meet Our Editors

Editor-in-Chief
Anthony S. Oates
Taiwan Semiconductor Mfg Co.