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Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on

Issue 3 • Date Mar 1993

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Displaying Results 1 - 12 of 12
  • Multiple layer discrete-time cellular neural networks using time-variant templates

    Publication Year: 1993 , Page(s): 191 - 199
    Cited by:  Papers (17)  |  Patents (5)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (912 KB)  

    A generalized architecture for discrete-time cellular neural networks (DTCNNs) is provided. It allows multiple layers of different architecture, which can be combined in several interconnection modes. Three elementary building blocks are introduced. Another important extension is the use of time-variant templates. They allow the definition of cyclic templates, where the coefficients are changed every iteration step and a set of templates is applied periodically. The definition of convergence has been adopted for this network structure, and important classes of templates are proved to be convergent. Examples are given for the following image processing tasks: rectangular hull extraction, skeletonization, and halftoning View full abstract»

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  • Fourier optical realization of cellular neural networks

    Publication Year: 1993 , Page(s): 156 - 162
    Cited by:  Papers (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (528 KB)  

    Cellular neural networks (CNNs) consist of analog, nonlinear, dynamic processing elements which are locally interconnected. Most applications in the areas of image processing, pattern recognition and robot control require interconnections between all elements which are space invariant. This suggests an optical CNN implementation because optical processors are perfectly suited for both space invariant signal processing and complete interconnections between all elements. The theoretical and practical aspects of a hardware realization are described. The results of an optical CNN performing feature extraction are presented View full abstract»

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  • Current-mode techniques for the implementation of continuous- and discrete-time cellular neural networks

    Publication Year: 1993 , Page(s): 132 - 146
    Cited by:  Papers (95)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1180 KB)  

    A unified, comprehensive approach to the design of continuous-time (CT) and discrete-time (DT) cellular neural networks (CNNs) using CMOS current-mode analog techniques is presented. The net input signals are currents instead of voltages, which avoids the need for current-to-voltage dedicated interfaces in image processing tasks with photosensor devices. Outputs may be either currents or voltages. Cell design relies on exploiting current mirror properties for the efficient implementation of both linear and nonlinear analog operators. Basic design issues, the influence of nonidealities and advanced circuit design issues, and design for manufacturability considerations associated with statistical analysis are discussed. Experimental results are given for three prototypes designed for 1.6-μm n-well CMOS technologies. One is discrete-time and can be reconfigured via local logic for noise removal, feature extraction (borders and edges), shadow detection, hole filling, and connected component detection (CCD) on a rectangular grid with unity neighborhood radius. The other two prototypes are continuous-time and fixed template: one for CCD and other for noise removal View full abstract»

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  • A current-mode cellular neural network implementation

    Publication Year: 1993 , Page(s): 147 - 155
    Cited by:  Papers (29)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (832 KB)  

    A compact and efficient current-mode circuit implementation for a cellular neural network is presented. The implementation presented consists of current amplifiers, simple current mirrors, simple current sources, and transconductors. Experimental results from first-generation CMOS monolithic prototypes with fixed connection weights show the feasibility of the proposed implementation by successfully performing edge detection and noise removal image processing View full abstract»

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  • Winner-take-all cellular neural networks

    Publication Year: 1993 , Page(s): 184 - 190
    Cited by:  Papers (20)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (456 KB)  

    An implementation of winner-take-all behavior in inputless cellular neural networks (CNNs) is presented which is defined as follows: the eventual output of the cell with the largest initial state is +1, while that of all other cells is -1. Although this basically requires a fully interconnected network, a simplified structure with only linear architectural complexity exist. Exact parameters are derived for winner-take-all CNNs with an arbitrary number of cells, such that their robustness with respect to the simplified structure is maximum. A proof of functionality is given which encompasses both the nominal and the distributed networks. It is found that accuracy requirements increase with the number of cells, such that the largest winner-take-all CNNs that can be reliably implemented with current methods may consist of only about ten cells. Also presented is a thorough example of how to apply a robust design method to the exact determination of optimal CNN parameters and network robustness View full abstract»

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  • CMOS implementation of an analogically programmable cellular neural network

    Publication Year: 1993 , Page(s): 206 - 215
    Cited by:  Papers (10)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (720 KB)  

    The criteria for designing the basic building blocks of an analogically programmable cellular neural network (CNN) in a 1.5-μm CMOS technology are reported. The simulated electrical performances of a 10×10 CMOS CNN, consisting of about 8000 MOS transistors, are presented and discussed. It is shown that the designed CNN can be successfully used to perform such useful functions as noise removal, edge detection, hole filling, shadow detection, and connected component recognition View full abstract»

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  • The CNN universal machine: an analogic array computer

    Publication Year: 1993 , Page(s): 163 - 173
    Cited by:  Papers (332)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1108 KB)  

    A new invention, the cellular neural network (CNN) universal machine and supercomputer, is presented. This is the first algorithmically programmable analog array computer having real-time and supercomputer power on a single chip. The CNN universal machine is described, emphasizing its programmability as well as global and distributed analog memory and logic, high throughput via electromagnetic waves, and complex cells that may be used also for simulating a broad class of PDEs. Its implementation, the CNN universal chip, is also described, along with its use of a multichip supercomputer. Other types of hardware implementations are also briefly discussed. Details of the algorithmic aspects of the new type of analogic (analog logic) algorithms, as well as the analogic software (language, compiler, machine code, etc.) are explained, along with a brief description of the available CNN workstation for implementing and simulating these new concepts. A broad range of applications is reviewed, including neuromorphic computing, programmable physics, programmable chemistry, and programmable bionics View full abstract»

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  • MODA: moving object detecting architecture

    Publication Year: 1993 , Page(s): 174 - 183
    Cited by:  Papers (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (644 KB)  

    A type of cellular neural network (CNN) is described, which may be classified in the broader category of generalized cellular neural networks (GCNNs). Its novelty consists both in the task it performs and in its architecture and way of operation. The input to the network is a two-dimensional picture that is processed continuously in order to detect real time trajectories of moving objects in a noisy environment. MODA is designed by synthesis, so that it does not require learning, and it performs its task by implementing a nonlinear continuous functional in a vector space. The network, its architecture, its equations, and the method of design are described. In addition, the new network is compared with known paradigms of ANN and CNN. Results of simulations are also reported View full abstract»

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  • Analog CMOS implementation of cellular neural networks

    Publication Year: 1993 , Page(s): 200 - 206
    Cited by:  Papers (9)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (420 KB)  

    The analog CMOS circuit realization of cellular neural networks with transconductance elements is presented. This realization can be easily adapted to various types of applications in image processing just by choosing the appropriate transconductance parameters according to the predetermined coefficients. The effectiveness of the designed circuits for connected component detection is shown by HSPICE simulations. For fixed function cellular neural network circuits, the number of transistors is reduced further by using multi-input transconductance elements View full abstract»

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  • High-speed character recognition using a dual cellular neural network architecture (CNND)

    Publication Year: 1993 , Page(s): 223 - 231
    Cited by:  Papers (13)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (724 KB)  

    An effective character recognition procedure implemented on a new type of hardware system and using a new architecture called CNND is proposed. This CNND contains one or more analog cellular neural networks (CNNs) and some digital logic, combining the advantages of the fast analog CNN signal processing and the fast and easy decision capability of digital logic. It is shown that the CNND system can be used for recognition of multifont printed or handwritten characters and could recognize 100,000 char/s with a recognition rate of more than 95%. The more advantage of the system over competing types is that there is not an extra feature extraction procedure implemented in slow hardware View full abstract»

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  • Designing cellular neural networks for the evaluation of local Boolean functions

    Publication Year: 1993 , Page(s): 219 - 223
    Cited by:  Papers (2)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (384 KB)  

    Describes general methods for designing a cellular neural network implementing an arbitrary Boolean function defined on the r-neighborhood. This is achieved by operating the network with time-variant templates as a cellular automaton that processes only binary inputs. These methods are suitable for solving local tasks. As an example, testing minimal distances is discussed View full abstract»

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  • Analog CMOS implementation of a discrete time CNN with programmable cloning templates

    Publication Year: 1993 , Page(s): 215 - 218
    Cited by:  Papers (16)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (332 KB)  

    An analog CMOS implementation of cells for building discrete-time cellular neural networks (DT-CNNs), based on current-mode multipliers and capacitive storage for the analog initial states and cloning templates, is presented. Since the cloning templates are programmable, the circuit could be used for several applications, or it could be reconfigured to perform different tasks on the initial input data sequentially. A chip prototype containing to DT-CNN cells has been designed and manufactured, and some experimental results showing the functionality of the circuit are provided View full abstract»

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Aims & Scope

This title ceased production in 2003. The current updated title is IEEE Transactions on Circuits and Systems II: Express Briefs.

Full Aims & Scope