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Biomedical Circuits and Systems, IEEE Transactions on

Issue 3 • Date June 2011

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Displaying Results 1 - 17 of 17
  • Table of contents

    Page(s): C1
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  • IEEE Transactions on Biomedical Circuits and Systems publication information

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  • A MEMS-Based Power-Scalable Hearing Aid Analog Front End

    Page(s): 201 - 213
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (2700 KB) |  | HTML iconHTML  

    A dual-channel directional digital hearing aid front end using microelectromechanical-systems microphones, and an adaptive-power analog processing signal chain are presented. The analog front end consists of a double differential amplifier-based capacitance-to-voltage conversion circuit, 40-dB variable gain amplifier (VGA) and a power-scalable continuous time sigma delta analog-to-digital converter (ADC), with 68-dB signal-to-noise ratio dissipating 67 μ W from a 1.2-V supply. The MEMS microphones are fabricated using a standard surface micromachining technology. The VGA and power-scalable ADC are fabricated on a 0.25-μ m complementary metal-oxide semciconductor TSMC process. View full abstract»

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  • Volumetric Flow Measurement Using an Implantable CMUT Array

    Page(s): 214 - 222
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (808 KB) |  | HTML iconHTML  

    This paper describes volumetric-flow velocity measurement using an implantable capacitive micromachined ultrasonic transducer (CMUT) array. The array is comprised of multiple-concentric CMUT rings for ultrasound transmission and an outmost annular CMUT array for ultrasound reception. Microelectromechanical-system (MEMS) fabrication technology allows reception CMUT on this flowmeter to be implemented with a different membrane thickness and gap height than that of transmission CMUTs, optimizing the performance of these two different kinds of devices. The silicon substrate of this 2-mm-diameter CMUT ring array was bulk micromachined to approximately 80 to 100 μm thick, minimizing tissue disruption. The blood-flow velocity was detected using pulse ultrasound Doppler by comparing the demodulated echo ultrasound with the incident ultrasound. The demodulated ultrasound signal was sampled by a pulse delayed in time domain from the transmitted burst, which corresponds to detecting the signal at a specific distance. The flow tube/vessel diameter was detected through the time-flight delay difference from near and far wall reflections, which was measured from the ultrasound pulse echo. The angle between the ultrasound beam and the flow was found by using the cross-correlation from consecutive ultrasound echoes. Artificial blood flowing through three different polymer tubes was experimented with, while keeping the same volumetric flow rate. The discrepancy in flow measurement results between this CMUT meter and a calibrated laser Doppler flowmeter is less than 5%. View full abstract»

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  • CMOS Conductometric System for Growth Monitoring and Sensing of Bacteria

    Page(s): 223 - 230
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (848 KB) |  | HTML iconHTML  

    We present the design and implementation of a prototype complementary metal-oxide semiconductor (CMOS) conductometric integrated circuit (IC) for colony growth monitoring and specific sensing of Escherichia coli (E. coli) bacteria. The detection of E. coli is done by employing T4 bacteriophages as receptor organisms. The conductometric system operates by measuring the resistance of the test sample between the electrodes of a two-electrode electrochemical system (reference electrode and working electrode). The CMOS IC is fabricated in a TSMC 0.35-μm process and uses a current-to-frequency (I to F) conversion circuit to convert the test sample resistance into a digital output modulated in frequency. Pulsewidth control (one-shot circuit) is implemented on-chip to control the pulsewidth of the output digital signal. The novelty in the current work lies in the ability of the CMOS sensor system to monitor very low initial concentrations of bacteria (4×102 to 4×104 colony forming unit (CFU)/mL). The CMOS system is also used to record the interaction between E. coli and its specific receptor T4 bacteriophage. The prototype CMOS IC consumes an average power of 1.85 mW with a 3.3-V dc power supply. View full abstract»

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  • An Implementation of a Spike-Response Model With Escape Noise Using an Avalanche Diode

    Page(s): 231 - 243
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1793 KB) |  | HTML iconHTML  

    This paper introduces a novel probabilistic spike-response model through the combination of avalanche diode-generated Poisson distributed noise, and a standard exponential decay-based spike-response curve. The noise source, which is derived from a 0.35-μm single-photon avalanche diode (kept in the dark), was tested experimentally to verify its characteristics, before being combined with a field-programmable gate-array implementation of a spike-response model. This simple model was then analyzed, and shown to reproduce seven of eight behaviors recorded during an extensive study of the ventral medial hypothalamic (VMH) region of the brain. It is thought that many of the cell types found within the VMH are fed from a tonic noise synaptic input, where the patterns generated are a product of their spike response and not their interconnection. This paper shows how this tonic noise source can be modelled, and due to the independent nature of the noise sources, provides an avenue for the exploration of networks of noise-fueled neurons, which play a significant role in pattern generation within the brain. View full abstract»

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  • Floating Gate Synapses With Spike-Time-Dependent Plasticity

    Page(s): 244 - 252
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (693 KB) |  | HTML iconHTML  

    This paper describes a single transistor floating-gate synapse device that can be used to store a weight in a nonvolatile manner, compute a biological EPSP, and demonstrate biological learning rules such as Long-Term Potentiation, LTD, and spike-time dependent plasticity. We also describe a highly scalable architecture of a matrix of synapses to implement the described learning rules. Parameters for weight update in the 0.35 um process have been extracted and can be used to predict the change in weight based on time difference between pre- and post-synaptic spike times. View full abstract»

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  • Variable-Gain, Low-Noise Amplification for Sampling Front Ends

    Page(s): 253 - 261
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (843 KB) |  | HTML iconHTML  

    This paper presents a low-noise front-end amplifier with configurable gain, targeting the recording of small signals, such as the electrocardiogram (ECG) or electroneurogram (ENG). The circuit consists of a continuous-time input stage using lateral bipolar transistors realized in complementary metal-oxide semiconductor (CMOS) technology followed by a switched-capacitor integrating stage. The voltage gain is adjustable by varying the phase delay between two system clocks. Simulated and measured results for a chip fabricated in 0.35-μm CMOS technology are reported. The amplifier occupies an active area of 0.064 mm2, yields a nominal gain of 630 V/V with more than a 50-dB tuning range, less than 16 nVrms/√Hz input noise and a common-mode rejection of more than 97 dB. Its power consumption is 280 μW with a ±1.5-V supply. View full abstract»

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  • Energy Efficient Low-Noise Neural Recording Amplifier With Enhanced Noise Efficiency Factor

    Page(s): 262 - 271
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1368 KB) |  | HTML iconHTML  

    This paper presents a neural recording amplifier array suitable for large-scale integration with multielectrode arrays in very low-power microelectronic cortical implants. The proposed amplifier is one of the most energy-efficient structures reported to date, which theoretically achieves an effective noise efficiency factor (NEF) smaller than the limit that can be achieved by any existing amplifier topology, which utilizes a differential pair input stage. The proposed architecture, which is referred to as a partial operational transconductance amplifier sharing architecture, results in a significant reduction of power dissipation as well as silicon area, in addition to the very low NEF. The effect of mismatch on crosstalk between channels and the tradeoff between noise and crosstalk are theoretically analyzed. Moreover, a mathematical model of the nonlinearity of the amplifier is derived, and its accuracy is confirmed by simulations and measurements. For an array of four neural amplifiers, measurement results show a midband gain of 39.4 dB and a -3-dB bandwidth ranging from 10 Hz to 7.2 kHz. The input-referred noise integrated from 10 Hz to 100 kHz is measured at 3.5 μVrms and the power consumption is 7.92 μW from a 1.8-V supply, which corresponds to NEF = 3.35. The worst-case crosstalk and common-mode rejection ratio within the desired bandwidth are - 43.5 dB and 70.1 dB, respectively, and the active silicon area of each amplifier is 256 μm × 256 μm in 0.18-μm complementary metal-oxide semiconductor technology. View full abstract»

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  • Efficient Power-Transfer Capability Analysis of the TET System Using the Equivalent Small Parameter Method

    Page(s): 272 - 282
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1506 KB) |  | HTML iconHTML  

    Transcutaneous energy transfer (TET) enables the transfer of power across the skin without direct electrical connection. It is a mechanism for powering implantable devices for the lifetime of a patient. For maximum power transfer, it is essential that TET systems be resonant on both the primary and secondary sides, which requires considerable design effort. Consequently, a strong need exists for an efficient method to aid the design process. This paper presents an analytical technique appropriate to analyze complex TET systems. The system's steady-state solution in closed form with sufficient accuracy is obtained by employing the proposed equivalent small parameter method. It is shown that power-transfer capability can be correctly predicted without tedious iterative simulations or practical measurements. Furthermore, for TET systems utilizing a current-fed push-pull soft switching resonant converter, it is found that the maximum energy transfer does not occur when the primary and secondary resonant tanks are “tuned” to the nominal resonant frequency. An optimal turning point exists, corresponding to the system's maximum power-transfer capability when optimal tuning capacitors are applied. View full abstract»

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  • Integrated High-Voltage Inductive Power and Data-Recovery Front End Dedicated to Implantable Devices

    Page(s): 283 - 291
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    In near-field electromagnetic links, the inductive voltage is usually much larger than the compliance of low-voltage integrated-circuit (IC) technologies used for the implementation of implantable devices. Thus most integrated power-recovery approaches limit the induced signal to low voltages with inefficient shunt regulation or voltage clipping. In this paper, we propose using high-voltage (HV) complementary metal-oxide semiconductor technology to fully integrate the inductive power and data-recovery front end while adopting a step-down approach where the inductive voltage is left free up to 20 or 50 V. The advantage is that excessive inductive power will translate to an additional charge that can be stored in a capacitor, instead of shunting to ground excessive current with voltage limiters. We report the design of two consecutive HV custom ICs-IC1 and IC2-fabricated in DALSA semiconductor C08G and C08E technologies, respectively, with a total silicon area (including pads) of 4 and 9 mm2, respectively. Both ICs include HV rectification and regulation; however, IC2 includes two enhanced rectifier designs, a voltage-doubler, and a bridge rectifier, as well as data recovery. Postlayout simulations show that both IC2 rectifiers achieve more than 90% power efficiency at a 1-mA load and provide enough room for 12-V regulation at a 3-mA load and a maximum-available inductive power of 50 mW only. Successful measurement results show that HV regulators provide a stable 3.3- to 12-V supply from an unregulated input up to 50 or 20 V for IC1 and IC2, respectively, with performance that matches simulation results. View full abstract»

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  • A Low-Power Asynchronous Step-Down DC–DC Converter for Implantable Devices

    Page(s): 292 - 301
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1250 KB) |  | HTML iconHTML  

    In this paper, we present a fully integrated asynchronous step-down switched capacitor dc-dc conversion structure suitable for supporting ultra-low-power circuits commonly found in biomedical implants. The proposed converter uses a fully digital asynchronous state machine as the heart of the control circuitry to generate the drive signals. To minimize the switching losses, the asynchronous controller scales the switching frequency of the drive signals according to the loading conditions. It also turns on additional parallel switches when needed and has a backup synchronous drive mode. This circuit regulates load voltages from 300 mV to 1.1 V derived from a 1.2-V input voltage. A total of 350 pF on-chip capacitance was implemented to support a maximum of 230-μ W load power, while providing efficiency up to 80%. The circuit validating the proposed concepts was fabricated in 0.13- μm complementary metal-oxide semiconductor technology. Experimental test results confirm the expected functionality and performance of the proposed circuit. View full abstract»

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  • IEEE Transactions on Biomedical Circuits and Systems Information for authors

    Page(s): 304
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  • IEEE Transactions on Biomedical Circuits and Systems society information

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Aims & Scope

IEEE Transactions on Biomedical Circuits and Systems (TBioCAS) publishes peer-reviewed manuscripts reporting original and transformative research at the intersection between the life sciences and circuits and systems engineering principles.

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Meet Our Editors

Editor-in-Chief
Gert Cauwenberghs
University of California at San Diego