Proceedings of the IEEE

Issue 5 • May 1993

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Displaying Results 1 - 11 of 11
  • Memory LSI reliability

    Publication Year: 1993, Page(s):768 - 775
    Cited by:  Papers (3)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (824 KB)

    Large-scale integrated (LSI) memory circuit reliability is reviewed. Reliability of large-scale integrated memory circuits is discussed. The major physical mechanisms for failures in memory LSIs and measures to counter these failures are reviewed. Fault-tolerant techniques, divided into the spare row/column line substitution. (SLS) technique and the on-chip error-correcting code (ECC) technique, d... View full abstract»

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  • IC failure analysis: techniques and tools for quality reliability improvement

    Publication Year: 1993, Page(s):703 - 715
    Cited by:  Papers (37)  |  Patents (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1600 KB)

    The role of failure analysis is discussed. Failure analysis techniques and tools, including electrical measurements, optical microscopy, thermal imaging analysis, electron beam techniques, light emission microscopy, ion beam techniques, and scanning probe microscopy, are reviewed. Opportunities for advances in the field of IC failure analysis are considered View full abstract»

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  • Fault tolerant VLSI systems

    Publication Year: 1993, Page(s):745 - 758
    Cited by:  Papers (14)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1176 KB)

    A wide variety of fault tolerance techniques for VLSI technology are examined. Device-, gate-, and function-levels fault models are described. The basic methods available to the designer of fault tolerance measures are introduced by surveying redundancy techniques. Techniques of fault detection that use space, time, and information redundancies, algorithm-based fault tolerance, in VLSI components,... View full abstract»

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  • Future CMOS scaling and reliability

    Publication Year: 1993, Page(s):682 - 689
    Cited by:  Papers (95)  |  Patents (12)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (556 KB)

    The goals and constraints of MOSFET scaling are reviewed, and the role of reliability constraints is highlighted. It is concluded that judicial shrinking of MOSFET device dimensions can sustain the historical trend of scaling through the 0.09-μm (4-Gb SRAM) generation of technology, which may be used for IC production in the year 2010. Power supply voltage reduction plus the desire for large tr... View full abstract»

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  • Reliability issues of flash memory cells

    Publication Year: 1993, Page(s):776 - 788
    Cited by:  Papers (118)  |  Patents (76)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1020 KB)

    Reliability issues for flash electrically erasable programmable read-only memories are reviewed. The reliability of both the source-erase type (ETOX) flash memory and the NAND structure EEPROM are discussed. Disturbs during programming, write/erase endurance, charge loss of both devices are reviewed, and the reliability of the tunnel oxide and the interpoly dielectric are described. It is shown th... View full abstract»

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  • ULSI reliability through ultraclean processing

    Publication Year: 1993, Page(s):716 - 729
    Cited by:  Papers (28)  |  Patents (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1280 KB)

    The importance of ultraclean processing in establishing advanced process technologies for deep submicron ULSI fabrication is discussed. The most essential requirement for the process technologies is the simultaneous fulfilment of the three principles of ultraclean technology: ultraclean wafer surface, ultraclean processing environment, and perfect process-parameter control. The growth of high-crys... View full abstract»

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  • ASIC reliability and qualification: a user's perspective

    Publication Year: 1993, Page(s):759 - 767
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (844 KB)

    The process of qualifying an application-specific integrated circuit (ASIC) such as gate arrays of standard cells, that is used in product development at the IBM Rochester, Minnesota, development laboratory is reviewed. The emphasis is on reliability and its evaluation during the qualification process. The varying degrees of involvement in qualification activities that a supplier has had over the ... View full abstract»

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  • ESD: a pervasive reliability concern for IC technologies

    Publication Year: 1993, Page(s):690 - 702
    Cited by:  Papers (94)  |  Patents (31)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1520 KB)

    Several aspects of ESD are described from the point of view of the test, design, product, and reliability engineering. A review of the ESD phenomena along with the test methods, the appropriate on-chip protection techniques, and the impact of process technology advances from CMOS to BiCMOS on the ESD sensitivity of IC protection circuits are presented. The status of understanding in the field of E... View full abstract»

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  • Design for reliability: the major challenge for VLSI

    Publication Year: 1993, Page(s):730 - 744
    Cited by:  Papers (27)  |  Patents (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1172 KB)

    Selected integrated circuit (IC) reliability issues are discussed within the context of the design-in reliability concept. The electrical reliability issues discussed are latchup, electrostatic discharge, hot carrier effects, thin dielectric breakdown, and electromigration. Examples of the environmental reliability issues discussed are α-particle induced soft errors, thermal stress, mechanic... View full abstract»

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  • VLSI reliability challenges: from device physics to wafer scale systems

    Publication Year: 1993, Page(s):653 - 674
    Cited by:  Papers (8)  |  Patents (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2032 KB)

    The philosophical and practical differences between Japanese and US IC industries in regard to VLSI reliability, as well as recent research topics and new analysis methods such as wafer scale testing, are discussed. It is suggested that a new approach to VLSI reliability is needed in response to the paradigm shift being brought about by simple scaling limitations, increased process complexity and ... View full abstract»

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  • VLSI reliability in Europe

    Publication Year: 1993, Page(s):675 - 681
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (580 KB)

    Several issue's regarding VLSI reliability research in Europe are discussed. Organizations involved in stimulating the activities on reliability by exchanging information or supporting research programs are described. Within one such program, ESPRIT, a technical interest group on IC reliability was formed to formulate particular needs and necessary improvements in education and research. In additi... View full abstract»

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H. Joel Trussell
North Carolina State University