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# IEEE Transactions on Circuits and Systems I: Regular Papers

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Displaying Results 1 - 22 of 22

Publication Year: 2011, Page(s):C1 - C4
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• ### IEEE Transactions on Circuits and Systems—I: Regular Papers publication information

Publication Year: 2011, Page(s): C2
| PDF (39 KB)
• ### Analog IC Design in Ultra-Thin Oxide CMOS Technologies With Significant Direct Tunneling-Induced Gate Current

Publication Year: 2011, Page(s):645 - 653
Cited by:  Papers (2)
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Recent studies have shown that manufacturing costs and design complexities may delay the widespread use of high-κ/metal gate nanoscale CMOS technologies. This implies that traditional (non-high-κ/non-metal gate) ultra-thin oxide technologies will remain active due to economic factors for longer periods of time. Direct tunneling is a significant source of MOSFET gate current in these ... View full abstract»

• ### On the Noise Optimization of CMOS Common-Source Low-Noise Amplifiers

Publication Year: 2011, Page(s):654 - 667
Cited by:  Papers (6)
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In this paper, we propose a general noise optimization technique for the CMOS common-source low-noise amplifiers. By directly employing the short-channel MOSFET - characteristic and van der Ziel's noise model, we derive design equations for the selection of the circuit design parameters, such as transistor sizes, passive component values, and bias voltages, which are subject to various gain and cu... View full abstract»

• ### Analysis of $hbox {IM}_{rm 3}$ Asymmetry in MOSFET Small-Signal Amplifiers

Publication Year: 2011, Page(s):668 - 676
Cited by:  Papers (10)
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This paper describes and analyzes asymmetry issues for weakly nonlinear MOSFET Common-Gate (CG) and Common-Source (CS) architectures. Using a Volterra series analysis, the cause of asymmetry in CG and CS amplifiers is explained. The asymmetry between high-side and low-side products in the CG amplifier exhibits a larger amplitude difference at low-frequency offset than at high frequency offset, whi... View full abstract»

• ### A Phase and Amplitude Tunable Quadrature $LC$ Oscillator: Analysis and Design

Publication Year: 2011, Page(s):677 - 689
Cited by:  Papers (15)
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This paper presents a new analytical approach to extract closed form equations for phase and amplitude imbalances raised from mismatches between two LC-tanks in quadrature oscillators. For more generality, we considered different coupling factors for the two coupled oscillators. This makes our analysis so general that we could design a phase and amplitude tunable quadrature oscillator accordingly.... View full abstract»

• ### Digital Calibration of Capacitor Mismatch in Sigma-Delta Modulators

Publication Year: 2011, Page(s):690 - 698
Cited by:  Papers (11)
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This paper presents a capacitor mismatch calibration technique in multibit discrete-time sigma-delta (ΣΔ) modulators based on a capacitor error model, including nonideal integrator gain errors. This model enables the compensation of mismatch-induced nonlinear memory errors in conversion using a simple flnite impulse-response structure. Single-bit pseudorandom noise (PN) is utilized t... View full abstract»

• ### A CMOS Instrumentation Amplifier With 90-dB CMRR at 2-MHz Using Capacitive Neutralization: Analysis, Design Considerations, and Implementation

Publication Year: 2011, Page(s):699 - 710
Cited by:  Papers (22)
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The benefits of using “current feedback” in instrumentation amplifier (IA) design are well known. In this paper, we analyze the mismatch mechanisms, both random and systematic types, which influence the common-mode rejection ratio (CMRR) performance of the local current feedback IA topology. We derive analytical expressions for the common-mode gain frequency response due to random mi... View full abstract»

• ### Energy-Saving Cooperative Spectrum Sensing Processor for Cognitive Radio System

Publication Year: 2011, Page(s):711 - 723
Cited by:  Papers (18)
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Cooperative spectrum sensing has recently become an important research topic for cognitive radio systems because it solves the hidden terminal problem in single-user spectrum sensing. However, idle cognitive users must consume massive spectrum sensing energy for one operating cognitive user. This characteristic reduces the attraction of the cooperative spectrum sensing technique in practical cogni... View full abstract»

• ### Dynamical Properties and Design Analysis for Nonvolatile Memristor Memories

Publication Year: 2011, Page(s):724 - 736
Cited by:  Papers (119)
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Novel nonvolatile universal memory technology is essential for providing required storage for nanocomputing. As a potential contender for the next-generation memory, the recently found "the missing fourth circuit element," memristor, has drawn a great deal of research interests. In this paper, by starting from basic memristor device equations, we develop a comprehensive set of properties and desig... View full abstract»

• ### Two-Dimensional Partially Differential Cepstrum and Its Applications on Filter Stabilization and Phase Unwrapping

Publication Year: 2011, Page(s):737 - 745
Cited by:  Papers (3)
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A new type of differential cepstrum (DC) named as partially DC (PDC) is introduced. While compared with the previously defined DC, the PDC saves half the computational complexity since only one dimension of the partial derivative is considered. Nevertheless, for the calculation of the complex cepstrum (CC), using the PDC avoids the phase-unwrapping routine as well. One application is to construct ... View full abstract»

• ### Design of 2-D Wideband Circularly Symmetric FIR Filters by Multiplierless High-Order Transformation

Publication Year: 2011, Page(s):746 - 754
Cited by:  Papers (12)
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In this paper, we modify the original McClellan transformation to a th-order version, and on the basis of the th-order McClellan transformation, we propose two high-order transformations for designing circularly symmetric wideband two-dimensional (2-D) digital FIR filter. The circularity of the resulting 2-D filters designed by our transformations is comparable to those 2-D filters designed by the... View full abstract»

• ### Multidimensional DFT IP Generator for FPGA Platforms

Publication Year: 2011, Page(s):755 - 764
Cited by:  Papers (10)
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Multidimensional (MD) discrete Fourier transform (DFT) is a key kernel algorithm in many signal processing applications. In this paper we describe an MD-DFT intellectual property (IP) generator and a bandwidth-efficient MD DFT IP for high performance implementations of 2-D and 3-D DFT on field-programmable gate array (FPGA) platforms. The proposed architecture is generated automatically and is bas... View full abstract»

• ### Observations Concerning the Locking Range in a Complementary Differential $LC$ Injection-Locked Frequency Divider—Part II: Design Methodology

Publication Year: 2011, Page(s):765 - 776
Cited by:  Papers (15)
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An intuitive approach to analyze the behavior of an Injection-Locked Frequency Divider was presented in Part I of this work; that paper provided insight into the locking behavior in the valid design area of the circuit. In this paper, we present a rigorous design methodology which provides a closed form equation showing where the locking range is wider. Theoretical predictions of the locked region... View full abstract»

• ### A 32$,times,$ 32 Pixel Convolution Processor Chip for Address Event Vision Sensors With 155 ns Event Latency and 20 Meps Throughput

Publication Year: 2011, Page(s):777 - 790
Cited by:  Papers (22)  |  Patents (1)
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This paper describes a convolution chip for event-driven vision sensing and processing systems. As opposed to conventional frame-constraint vision systems, in event-driven vision there is no need for frames. In frame-free event-based vision, information is represented by a continuous flow of self-timed asynchronous events. Such events can be processed on the fly by event-based convolution chips, p... View full abstract»

• ### An Asynchronous Spike Event Coding Scheme for Programmable Analog Arrays

Publication Year: 2011, Page(s):791 - 799
Cited by:  Papers (9)
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This paper presents a spike time event coding scheme for transmission of analog signals between configurable analog blocks (CABs) in a programmable analog array. The analog signals from CABs are encoded as spike time instants dependent upon input signal activity and are transmitted asynchronously by employing the address event representation protocol (AER), a widely used communication protocol in ... View full abstract»

• ### Adaptive Unknown-Input Observers-Based Synchronization of Chaotic Systems for Telecommunication

Publication Year: 2011, Page(s):800 - 812
Cited by:  Papers (21)
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We propose a robust adaptive chaotic synchronization method based on unknown-input observers for master-slave synchronization of chaotic systems, with application to secured communication. The slave system is modelled by an unknown input observer in which, the unknown input is the transmitted information. As in the general observer-based synchronization paradigm, the information is recovered if th... View full abstract»

• ### Lattice Reduction for MIMO Detection: From Theoretical Analysis to Hardware Realization

Publication Year: 2011, Page(s):813 - 826
Cited by:  Papers (21)
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The advent of multiple-input-multiple-output (MIMO) techniques has resulted in the generation of new design problems, especially in the baseband processing task of symbol detection. Lattice reduction (LR)-aided detection techniques have emerged as a low-complexity method to achieve the same diversity as the maximum likelihood detector. In this article we explore efficient hardware realization of t... View full abstract»

• ### Multicarrier Faster-Than-Nyquist Transceivers: Hardware Architecture and Performance Analysis

Publication Year: 2011, Page(s):827 - 838
Cited by:  Papers (27)  |  Patents (4)
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This paper evaluates the hardware aspects of multicarrier faster-than-Nyquist (FTN) signaling transceivers. The choice of time-frequency spacing of the symbols in an FTN system for improved bandwidth efficiency is targeted towards efficient hardware implementation. This work proposes a hardware architecture for the realization of iterative decoding of FTN multicarrier modulated signals. Compatibil... View full abstract»

• ### A High-Throughput LDPC Decoder Architecture With Rate Compatibility

Publication Year: 2011, Page(s):839 - 847
Cited by:  Papers (18)
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This paper presents a high-throughput decoder architecture for rate-compatible (RC) low-density parity-check (LDPC) codes which supports arbitrary code rates between the rate of mother code and 1. Puncturing techniques are applied to produce different rates for quasi-cyclic (QC) LDPC codes with dual-diagonal parity structure. Simulation results show that our selected puncturing scheme only introdu... View full abstract»

• ### IEEE Transactions on Circuits and Systems—I: Regular Papers Information for authors

Publication Year: 2011, Page(s): 848
| PDF (119 KB)
• ### IEEE Circuits and Systems Society Information

Publication Year: 2011, Page(s): C3
| PDF (33 KB)

## Aims & Scope

The theory, analysis, design, and practical implementations of circuits, and the application of circuit techniques to systems and to signal processing.

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## Meet Our Editors

Editor-in-Chief

Andreas Demosthenous
Dept. Electronic & Electrical Engineering
University College London
London WC1E 7JE, UK