# IEEE Transactions on Device and Materials Reliability

## Filter Results

Displaying Results 1 - 25 of 35
• ### [Front cover]

Publication Year: 2011, Page(s): C1
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• ### IEEE Transactions on Device and Materials Reliability publication information

Publication Year: 2011, Page(s): C2
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Publication Year: 2011, Page(s):1 - 2
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• ### Changes to the Editorial Board of TDMR

Publication Year: 2011, Page(s):3 - 4
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• ### Proper Referencing of Prior Art

Publication Year: 2011, Page(s):5 - 6
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• ### The Improvement of High-$k$/Metal Gate pMOSFET Performance and Reliability Using Optimized Si Cap/SiGe Channel Structure

Publication Year: 2011, Page(s):7 - 12
Cited by:  Papers (13)
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The impact of the Si cap/SiGe layer on the Hf-based high-k /metal gate SiGe channel pMOSFET performance and reliability has been investigated. We proposed an optimized strain SiGe channel with a Si cap layer to overcome the Ge diffusion and confine the channel carriers in the strained SiGe layer without the formation of a significant parasitic channel at the interface. With this optimized S... View full abstract»

• ### Investigation of the off-State Behavior in Deep-Submicrometer NMOSFETs Under Heavy-Ion Irradiation by 3-D Simulation

Publication Year: 2011, Page(s):13 - 18
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The behavior of an off-state leakage current induced by heavy-ion irradiation in deep-submicrometer NMOSFETs is comprehensively investigated by 3-D simulation in this paper. The results show that the off-state drain current is increased, which is mainly due to the positively charged damage region generated by the heavy-ion strike in the shallow-trench isolation (STI) region. As the channel length ... View full abstract»

• ### Reassessing the Mechanisms of Negative-Bias Temperature Instability by Repetitive Stress/Relaxation Experiments

Publication Year: 2011, Page(s):19 - 34
Cited by:  Papers (38)
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A major intrinsic limitation of the reaction-diffusion (R-D) model for negative-bias temperature instability (NBTI) is revealed through dynamic stress experiments. We found no evidence of self-limiting recovery, one of the key features of the transport-based R-D model, after repeating the stress and relaxation cycles alternately for many times. The amount of recovery per cycle of the parameter of ... View full abstract»

• ### Impact of Near-Surface Thermal Stresses on Interfacial Reliability of Through-Silicon Vias for 3-D Interconnects

Publication Year: 2011, Page(s):35 - 43
Cited by:  Papers (135)
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Continual scaling of on-chip wiring structures has brought significant challenges for materials and processes beyond the 32-nm technology node in microelectronics. Recently, 3-D integration with through-silicon vias (TSVs) has emerged as an effective solution to meet the future interconnect requirement. Among others, thermomechanical reliability is a key concern for the development of TSV structur... View full abstract»

• ### Impact of SOI Thickness on FUSI-Gate CESL CMOS Performance and Reliability

Publication Year: 2011, Page(s):44 - 49
Cited by:  Papers (2)
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The impact of strain-induced oxide trap charge on the performance and reliability of fully silicided (FUSI)-metal-gate silicon-on-insulator (SOI) MOSFETs is investigated. High strain from a contact etch stop layer (CESL) in FUSI-gate transistors increases channel mobility and drain current driving. A CESL nMOSFET with a thick SOI demonstrates increased hot-electron degradation than its thin SOI co... View full abstract»

• ### Full Two-Dimensional Markov Chain Analysis of Thermal Soft Errors in Subthreshold Nanoscale CMOS Devices

Publication Year: 2011, Page(s):50 - 59
Cited by:  Papers (5)  |  Patents (14)
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Thermally induced fluctuations in the logic state of a simple flip-flop occur on a timescale that renders them impossible to simulate through Monte Carlo methods. In a previous work, an analytical framework based on Markov chains and queue theory was introduced along with a symbolic solution for a truncated 1-D queue, diagonally connecting the two stable logic states in a two-dimensional (2-D) que... View full abstract»

• ### Influence of Octadecyltrichlorosilane Surface Modification on Electrical Properties of Polymer Thin-Film Transistors Studied by Capacitance–Voltage Analysis

Publication Year: 2011, Page(s):60 - 65
Cited by:  Papers (3)
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The influence of octadecyltrichlorosilane (OTS) surface modification of a gate dielectric on the electrical properties of polymer thin-film transistors based on poly(3-hexylthiophene) is investigated by using capacitance-voltage analysis. Results show that surface modification using OTS can effectively increase the field-effect mobility in the saturation region by almost two orders of magnitude to... View full abstract»

• ### Effect of Moisture on Thermal Properties of Halogen-Free and Halogenated Printed-Circuit-Board Laminates

Publication Year: 2011, Page(s):66 - 75
Cited by:  Papers (1)
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Moisture plays an important role in the integrity and reliability of printed circuit boards (PCBs). The presence of moisture in a PCB alters its thermal performance and thermomechanical properties, thereby affecting overall performance. Due to the shift in market trends toward halogen-free products, halogen-free PCB materials have recently gained popularity. There are many studies on the behavior ... View full abstract»

• ### Improved Optical and ESD Characteristics for GaN-Based LEDs With an $hbox{n}^{-}hbox{-GaN}$ Layer

Publication Year: 2011, Page(s):76 - 80
Cited by:  Papers (5)
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Nitride-based light-emitting diodes (LEDs) with an n- -GaN layer are proposed and fabricated. By providing a larger series resistance in the vertical direction, it was found that the n--GaN layer could enhance LED output intensity due to the enhanced current spreading. It was also found that LEDs with n--GaN layer thicknesses of 0.15, 0.2, and 0.25 μm could ... View full abstract»

• ### Light Switched Plasma Charging Protection Device for High-Field Characterization and Flash Memory Protection

Publication Year: 2011, Page(s):81 - 85
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Plasma charging damage (PCD) is usually measured by comparing the measurement results of an undamaged reference structure to the results of structures, which intentionally received PCD. If wafer level reliability structures are required, these test structures, including the damage amplifying antenna, have to be small enough to fit into the scribeline. However, when these test structures, usually t... View full abstract»

• ### Statistical Evaluation of Electromigration Reliability at Chip Level

Publication Year: 2011, Page(s):86 - 91
Cited by:  Papers (11)
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Chip level electromigration (EM) reliability is determined by: 1) the element level EM failure probability used for design guideline generation; and 2) the distribution of EM elements against design limits. Balancing these two factors is critical for a chip design to achieve the best performance while maintaining chip level EM reliability. This paper discusses the relationship between element leve... View full abstract»

• ### Gate Voltage Influence on the Channel Hot-Carrier Degradation of High-$k$ -Based Devices

Publication Year: 2011, Page(s):92 - 97
Cited by:  Papers (6)
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In ultrascaled complimentary metal-oxide-semiconductor technologies, the lucky-electron model does not describe correctly Channel Hot-Carrier (CHC) degradation for typical transistor test conditions independently of the gate dielectric (SiO2 or high- k). A new model to describe the CHC degradation behavior in n-channel metal-oxide field-effect transistors, based on the dominant r... View full abstract»

• ### A Robust Low-$k$/Cu Dual Damascene Interconnect (DDI) With Sidewall Protection Layer (SPL)

Publication Year: 2011, Page(s):98 - 105
Cited by:  Papers (2)
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A robust Cu dual-damascene (DD) interconnect has been developed in a low-density (LD) SiOCH film (k = 2.7) with a low- k sidewall protection layer (SPL) made of plasmapolymerized divinylsiloxane-benzocyclobuten (p-BCB, k = 2.7). A thinned Ta/TaN barrier-metal (BM) structure combined with the low-k SPL was implemented. The SPL covering the DD sidewall in the LD-SiOCH film secures the ... View full abstract»

• ### Lifetime Estimation of an ACF in Navigation (March 2010)

Publication Year: 2011, Page(s):106 - 111
Cited by:  Papers (2)
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Recently, liquid crystal display (LCD) panels have become very important components for portable electronics. In the high-density interconnection material, anisotropic conductive films (ACFs) are used to connect the outer lead of the tape-automated bonding to the transparent indium tin oxide electrodes of the LCD panel. The ACF consists of an adhesive polymer matrix and randomly dispersed conducti... View full abstract»

• ### Analysis of Bias Stress Instability in Amorphous InGaZnO Thin-Film Transistors

Publication Year: 2011, Page(s):112 - 117
Cited by:  Papers (48)
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In this paper, we report an analysis of electrical bias stress instability in amorphous InGaZnO (a-IGZO) thin-film transistors (TFTs). Understanding the variations of TFT characteristics under an electrical bias stress is important for commercial goals. In this experiment, the positive gate bias is initially applied to the tested a-IGZO TFTs, and subsequently, the negative gate bias is applied to ... View full abstract»

• ### Degradation of High-$k$/Metal Gate nMOSFETs Under ESD-Like Stress in a 32-nm Technology

Publication Year: 2011, Page(s):118 - 125
Cited by:  Papers (5)
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The degradation of nMOSFETs induced by nondestructive electrostatic discharge-like (ESD-like) stress in a 32-nm bulk CMOS technology was studied using I- V characteristics and charge pumping measurements. The impact of stress on drain saturation current (Idsat), threshold voltage (Vt), transconductance peak (gm), and subthreshold swing (SS) is reported... View full abstract»

• ### Injected Charge to Recovery as a Parameter to Characterize the Breakdown Reversibility of Ultrathin HfSiON Gate Dielectric

Publication Year: 2011, Page(s):126 - 130
Cited by:  Papers (2)
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The injected charge to recovery (QR) is presented as a parameter to characterize the dielectric breakdown (BD) reversibility in MOSFETs with an ultrathin high- k hafnium-based gate dielectric. The procedure to recover the dielectric is explained, and the dependences of QR on the current limit during BD, the polarity of the BD-recovery stresses, and the number of stress cycles ... View full abstract»

• ### Geometric Component in Constant-Amplitude Charge-Pumping Characteristics of LOCOS- and LDD-MOSFET Devices

Publication Year: 2011, Page(s):131 - 140
Cited by:  Papers (4)
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In this paper, we develop a semianalytical model that predicts the geometric component in charge-pumping (CP) measurements for local oxidation of silicon (LOCOS) and lightly doped drain (LDD) transistors. It is not only based on thermal diffusion, drift field, and self-induced drift field but also on the contribution of the active CP area and the low-level voltage (VL) of the gate signal. B... View full abstract»

• ### The Application of Two-Dimensional X-ray Hot Stage in Flip Chip Package Failure Analysis

Publication Year: 2011, Page(s):141 - 147
Cited by:  Papers (2)
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Advancement of silicon and packaging technologies toward lower power and higher functionality requires better understanding between materials and process interactions. This paper illustrates the applications of 2-D X-ray metrology incorporated with a hot stage system for the first time in the literature, which allows one to simulate heating profiles of up to 300°C and observe the... View full abstract»

• ### Study of Accelerated Stability Test Method for Quartz Flexible Accelerometer

Publication Year: 2011, Page(s):148 - 156
Cited by:  Papers (7)
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The manufactured quartz flexible accelerometer has the serious problem of bad parametric repeatability. To solve this issue, this paper does systematic research about the accelerated stability test method to improve the long-term repeatability of the accelerometer from the product hierarchy. Proceeding from the analysis of the accelerometer's internal stress mechanism, it makes a positioning analy... View full abstract»

## Aims & Scope

IEEE Transactions on Device and Materials Reliability is published quarterly. It provides leading edge information that is critical to the creation of reliable electronic devices and materials, and a focus for interdisciplinary communication in the state of the art of reliability of electronic devices, and the materials used in their manufacture. It focuses on the reliability of electronic, optical, and magnetic devices, and microsystems; the materials and processes used in the manufacture of these devices; and the interfaces and surfaces of these materials.

Full Aims & Scope

## Meet Our Editors

Editor-in-Chief
Anthony S. Oates
Taiwan Semiconductor Mfg Co.