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IEEE Design & Test of Computers

Issue 1 • Date Jan.-Feb. 2011

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  • [Front cover]

    Publication Year: 2011, Page(s): c1
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  • [Front cover]

    Publication Year: 2011, Page(s): c2
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  • Call for Papers

    Publication Year: 2011, Page(s): 1
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  • Contents

    Publication Year: 2011, Page(s):2 - 3
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  • Embedded memory technologies: Present and future

    Publication Year: 2011, Page(s): 4
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  • Call for Papers

    Publication Year: 2011, Page(s): 5
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  • Guest editors' introduction: Nanoscale Memories Pose Unique Challenges

    Publication Year: 2011, Page(s):6 - 8
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  • [Masthead]

    Publication Year: 2011, Page(s): 9
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  • Embedded Memories: Progress and a Look into the Future

    Publication Year: 2011, Page(s):10 - 13
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (397 KB) | HTML iconHTML

    Memories are categorized as embedded memories (e-memories) and stand-alone memories. E-memories favor high speed rather than low cost. In addition, they must maintain compatibility with the logic process, because they must be cofabricated on the same chip as the logic. In contrast, standalone memories give the first priority to low cost and thus high density rather than high speed. There are two t... View full abstract»

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  • Embedded DRAM in 45-nm Technology and Beyond

    Publication Year: 2011, Page(s):14 - 21
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (563 KB) | HTML iconHTML

    As power and density requirements for embedded memories grow, products ranging from mobile applications to high-performance microprocessors are increasingly looking toward eDRAM as an alternative to SRAM. This article describes the state of the art in eDRAM architecture and design with a particular focus on test challenges and solutions. View full abstract»

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  • Bit Cell Optimizations and Circuit Techniques for Nanoscale SRAM Design

    Publication Year: 2011, Page(s):22 - 31
    Cited by:  Papers (13)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (297 KB) | HTML iconHTML

    Six-transistor SRAM cells have served as the workhorse embedded memory for several decades. However, with aggressive technology scaling, designers find it increasingly difficult to guarantee robust operation at low voltages because of the worsening process variation. This article presents circuit techniques pursued by industry to overcome SRAM scaling challenges in future technology nodes. View full abstract»

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  • Challenges and Directions for Low-Voltage SRAM

    Publication Year: 2011, Page(s):32 - 43
    Cited by:  Papers (27)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (4435 KB) | HTML iconHTML

    SRAMs capable of operating at extremely low supply voltages-for example, below the transistor threshold voltage-can enable ultra-low-power battery-operated systems by allowing the logic and memory to operate at the same optimal supply voltage. This review article presents SRAM techniques including new bit cells, novel sensing schemes, and read/write assist circuits for ultra-low-power applications... View full abstract»

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  • Modeling, Architecture, and Applications for Emerging Memory Technologies

    Publication Year: 2011, Page(s):44 - 51
    Cited by:  Papers (42)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1406 KB) | HTML iconHTML

    Spin-transfer torque RAM and phase-change RAM are vying to become the next-generation embedded memory, offering high speed, high density, and nonvolatility. This article discusses new opportunities and challenges presented by these two memory technologies with a particular emphasis on modeling and architecture design. View full abstract»

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  • Scalable Spin-Transfer Torque RAM Technology for Normally-Off Computing

    Publication Year: 2011, Page(s):52 - 63
    Cited by:  Papers (20)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2305 KB) | HTML iconHTML

    Nonvolatile embedded memories may open the door to new computing paradigms based on "normally-off and instant-on" operation. This article covers recent trends of spin-transfer-torque RAM technology, an emerging class of nonvolatile memory, and discusses its impact on the different layers of computer system hierarchy. View full abstract»

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  • Fast-Write Resistive RAM (RRAM) for Embedded Applications

    Publication Year: 2011, Page(s):64 - 71
    Cited by:  Papers (13)  |  Patents (40)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (775 KB) | HTML iconHTML

    Especially for microcontroller and mobile applications, embedded nonvolatile memory is an important technology offering to reduce power and provide local persistent storage. This article describes a new resistive RAM device with fast write operation to improve the speed of embedded nonvolatile memories. View full abstract»

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  • Evolution of EDA standards worldwide

    Publication Year: 2011, Page(s):72 - 75
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    In this paper EDA standards sponsored by the IEEE Design Automation Standards Committee are discussed. An introduction to the DASC and the original DASC standard, VHDL are also presented. View full abstract»

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  • Design for manufacturability: Then and now

    Publication Year: 2011, Page(s):76 - 77
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (114 KB) | HTML iconHTML

    This column examines the relationship between design and manufacturing: how it used to work, how it works now, and what the design-manufacturing interface portends for the future. View full abstract»

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  • EDA: Synergy or sum of the parts? [review of "Electronic Design Automation: Synthesis, Verification and Test (Systems on Silicon" (Wang, L.-T., Eds., et al; 2009)]

    Publication Year: 2011, Page(s):78 - 79
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  • Conference Reports

    Publication Year: 2011, Page(s):80 - 81
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  • CEDA Currents

    Publication Year: 2011, Page(s):82 - 83
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  • Design Automation Technical Committee Newsletter

    Publication Year: 2011, Page(s):84 - 85
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  • Test Technology TC Newsletter

    Publication Year: 2011, Page(s):86 - 87
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  • Playing together nicely

    Publication Year: 2011, Page(s): 88
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  • [Advertisement - Back cover]

    Publication Year: 2011, Page(s): c3
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  • [Advertisement - Back cover]

    Publication Year: 2011, Page(s): c4
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Aims & Scope

This Periodical ceased production in 2012. The current retitled publication is IEEE Design & Test.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief
Krishnendu Chakrabarty