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# IET Circuits, Devices & Systems

## Filter Results

Displaying Results 1 - 10 of 10
• ### Fast and accurate estimation of SRAM read and hold failure probability using critical point sampling

Publication Year: 2010, Page(s):469 - 478
Cited by:  Papers (4)
| | PDF (870 KB)

Owing to increase in parametric variations with technology scaling, accurate estimation of bit-cell failure probability in nano-scale static random access memory (SRAM) has become an extremely challenging task. In this study, the authors propose a method to detect the SRAM bit-cell failure, named critical point sampling. Using this technique, read and hold failure probability of an SRAM bit-cell... View full abstract»

• ### CMOS class-E power amplifier (1.8-GHz) with an additional thin-film technology

Publication Year: 2010, Page(s):479 - 485
| | PDF (692 KB)

A 1.8-GHz power amplifier is implemented using the 0.18-μm Radio Frequency (RF) Complementary Metal Oxide Semiconductor (CMOS) process. An additional thin-film technology on a separate substrate is used to design the output matching network for high efficiency. To minimise the number of bond-wires, a single differential power stage is used. The output matching network was completed with the... View full abstract»

• ### Analysis and design of a high-Q differential active inductor with wide tuning range

Publication Year: 2010, Page(s):486 - 495
Cited by:  Papers (7)
| | PDF (993 KB)

The analysis and design of a high-Q differential active inductor with wide tuning range is presented in this study. The self-resonant frequency (SRF) and quality factor (Q) of the inductor can be tuned independently. The inductor was implemented in a 0.13 μm CMOS process. The measured SRF is tunable from 0.5 to 10.2 GHz. The obtained maximum quality factor is as high as 3000. ... View full abstract»

• ### Grounded capacitor current mode single resistance-controlled oscillator using single modified current differencing transconductance amplifier

Publication Year: 2010, Page(s):496 - 502
Cited by:  Papers (3)
| | PDF (409 KB)

This study proposes a current mode canonical single resistance-controlled oscillator (SRCO) circuit based on a single modified current differencing transconductance amplifier. The circuit employs grounded capacitors and provides a current output with high output impedance. The proposed circuit also enables orthogonal control of frequency and oscillation condition. The performance of the proposed S... View full abstract»

• ### Offset voltage estimation model for latch-type sense amplifiers

Publication Year: 2010, Page(s):503 - 513
Cited by:  Papers (9)
| | PDF (558 KB)

A sense amplifier detects a small signal and amplifies it to produce a large signal. However, a sensing failure may occur owing to the offset voltage caused by the mismatch of paired transistors in the sense amplifier. Since the yield of a sense amplifier is the strong function of the offset voltage, estimation of the offset voltage and its statistical distribution is critical in designing sense a... View full abstract»

• ### Field programmable analogue array implementation of fractional step filters

Publication Year: 2010, Page(s):514 - 524
Cited by:  Papers (12)
| | PDF (685 KB)

In this study, the authors propose the use of field programmable analogue array hardware to implement an approximated fractional step transfer function of order (n + α) where n is an integer and 0 <; α <; 1. The authors show how these filters can be designed using an integer order transfer function approximation of the fractional order Laplacian operator sα. F... View full abstract»

• ### Analytical model for deriving the threshold voltage of a short gate SOI MESFET with vertically non-uniformly doped silicon film

Publication Year: 2010, Page(s):525 - 530
| | PDF (430 KB)

An analytical model for deriving the threshold voltage of a short gate SOI MESFET in which the silicon film doping density is vertically non-uniform is suggested. Taking into account the lateral variation of the bottom channel potential and using the derived natural length expression, the potentials in both silicon film and buried oxide layer are derived fully two-dimensionally. Making use of them... View full abstract»

• ### Theoretical and experimental determination of onset and scaling of non-quasi-static phenomena for interdigitated fin field effect transistors

Publication Year: 2010, Page(s):531 - 538
| | PDF (559 KB)

The efficient development of device fabrication and circuit design for microwave applications require a thorough analysis of the microwave performance of the intrinsic transistor with respect to the total gate periphery, since enlarging the transistor channel width allows in obtaining higher levels of output current and gain. Oftentimes, this analysis is carried out by using the intrinsic equivale... View full abstract»

• ### A new compact low-offset push-pull output buffer with current positive feedback for a 10-bit LCD source driver

Publication Year: 2010, Page(s):539 - 547
Cited by:  Papers (1)
| | PDF (869 KB)

In this study, a low-offset push-pull output buffer and an area-efficient resistor-capacitor digital-to-analogue converter for a 10-bit liquid crystal display (LCD) source driver are presented. Compared to other push-pull output buffers, the proposed output buffer has a smaller area and lower power consumption. Two complementary push-pull output buffers driving a pair of column lines realise a rai... View full abstract»

• ### Comparison of nano-scale complementary metal-oxide semiconductor and 3T-4T double gate fin-shaped field-effect transistors for robust and energy-efficient subthreshold logic

Publication Year: 2010, Page(s):548 - 560
Cited by:  Papers (1)
| | PDF (665 KB)

Subthreshold logic has gained wide research interest due to their suitability for ultra low-power applications, such as radio frequency identification, wireless micro sensors and so on, which demand low-energy consumption. Important concerns for subthreshold logic at present are increased sensitivity to process, voltage and temperature (PVT) variations. Analysis is done addressing the nano-scale c... View full abstract»

## Aims & Scope

IET Circuits, Devices & Systems covers the following topics:

Circuit theory and design, circuit analysis and simulation, computer aided design; filters (analogue and switched capacitor); circuit implementations, cells and architectures for integration including VLSI; testability, fault tolerant design, minimisation of circuits and CAD for VLSI; novel or improved electronic devices for both traditional and emerging technologies including nanoelectronics and MEMs, device and process characterisation, device parameter extraction schemes; mathematics of circuits and systems theory; test and measurement techniques involving electronic circuits, circuits for industrial applications, sensors and transducers.

Full Aims & Scope

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