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Power Electronics, IET

Issue 6 • Date Nov. 2010

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Displaying Results 1 - 15 of 15
  • On comparing the symmetrical and non-symmetrical selective harmonic elimination pulse-width modulation technique for two-level three-phase voltage source converters

    Page(s): 829 - 842
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (1965 KB)  

    Selective harmonic elimination pulse-width modulation (SHE-PWM) techniques offer a tight control of the harmonic spectrum of a given voltage waveform generated by a power electronic converter along with a low number of switching transitions. These optimal switching transitions can be calculated through Fourier theory, and for a number of years quarter-wave and half-wave symmetries have been assumed when formulating the problem. It is shown recently that symmetry requirements can be relaxed as a constraint. This changes the way the problem is formulated and different solutions can be found. This study presents different formulations of the problem, namely quarter-, half-wave symmetry and non-symmetrical waveform. A critical evaluation and comparison between the three schemes are reported here based on various aspects, such as number of eliminated harmonics, harmonic spectrum profile, harmonic phasing, converter performance, computational time and solution space limitations. Selected simulation and experimentally validated results are presented to confirm the theoretical work of this study. This manuscript is a revised and extended version of earlier paper that was presented at the IEEE PESC 2008, Rhodes, Greece, 15-19 June 2008, and has not been submitted to any other journal for consideration and possible publication. View full abstract»

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  • Series space vector modulation for multi-level cascaded H-bridge inverters

    Page(s): 843 - 857
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (1875 KB)  

    The study presents a series space vector modulation (SVM) method for multi-level cascaded H-bridge inverters. The proposed method is based on construction of multi-level reference voltage vectors from three-level voltage vectors, which are present in the space vector diagram of the multi-level inverter. The proposed approach is compared to the conventional SVM and the carrier-based pulse-width modulation (PWM) ones on 5-, 7-, and 13-level inverters. The implementation of these methods was simulated by Simulink. The simulation results show that implementation of the proposed series SVM is possible. Important advantages of the present series SVM approach against the conventional SVM one are simplicity and easy identification of triangles. Furthermore, it could be easily extended to any n-level inverter. View full abstract»

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  • Small signal modelling of open-loop SEPIC converters

    Page(s): 858 - 868
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (523 KB)  

    This study presents the application of a signal flow graph and the Mason's gain formula for deriving small signal models of open-loop single ended primary inductance converter (SEPIC) converters. The control to output and the input to output transfer functions are derived. Conventional modelling methods using the averaging and small signal linearisation techniques are powerful for basic converters like buck and boost. However, for high-order converters like SEPIC, solving of high-order symbolic equations becomes complex and difficult. In this study, the application of the signal flow graph and the Mason's gain formula help the manipulation of equations. Thus, derivation of small signal models can be easily carried out in detail. Theoretical and measured results are shown to verify the accuracy of the derived small signal models. View full abstract»

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  • Voltage regulation of photovoltaic arrays: small-signal analysis and control design

    Page(s): 869 - 880
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (1393 KB)  

    This study deals with the regulation of the output voltage of photovoltaic (PV) arrays. As a case study, the DC-DC buck converter is used as an interface between the PV array and the load, but other types of converters can be used for the same purpose. The input voltage of the converter is controlled in order to regulate the operating point of the array. Besides reducing losses and stress because of the bandwidth-limited regulation of the converter duty cycle, controlling the converter input voltage reduces the settling time and avoids oscillation and overshoot, making easier the functioning of maximum power point tracking (MPPT) methods. The voltage regulation problem is addressed with a detailed analysis that starts with the modelling of the PV array and the converter. This analysis is followed by study, design, simulation and practical experiments of three closed-loop control strategies for the buck converter. Control stability and implementation considerations are presented. View full abstract»

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  • HFSS simulation, experimental investigation and optimisation of heat sink EMI

    Page(s): 881 - 891
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (500 KB)  

    This study presents the approach for the minimisation of electromagnetic radiation from the heat sink by optimising the heat sink geometry parameters using Taguchi's design of experiments (DOE) technique. The heat sink is modelled using Ansoft HFSS software version 12 and the value of the emitted radiation is obtained by simulation. Experimental investigation was performed in a semi-anechoic chamber for a selected heat sink to observe the radiated emissions from it at a distance of 3 m. The simulation model was thus validated with the experimental results and hence, the simulation was continued for the combinations generated by the L27 (six factors, three levels) orthogonal array generated using Taguchi's DOE using the Minitab software. The factors considered for optimisation are the length and width of the heat sink, fin height, base height, number of fins and fin thickness. The analysis of variance test was carried out for finding out the contribution and impact of each heat sink design factor towards the radiations emitted by the heat sink. Additionally, a decision support for selecting the heat sink parameters for predicting the emitted radiations has been presented using the linear regression analysis and the results are compared with HFSS simulation results. View full abstract»

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  • Single-phase to three-phase four-leg converter applied to distributed generation system

    Page(s): 892 - 903
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (1271 KB)  

    This study proposes a distributed generation system managed by a power converter with reduced number of components. Such converter operates with the same characteristics of the full-bridge converter. The distributed generation system is constituted by an induction generator with a prime mover (PM), a single-phase utility grid and a photovoltaic panel. A wind, hydraulic or another controlled power source is adopted to drive the induction generator, operating as a pm. The advantages of the four-leg power converter are explored in this application, such as reduced number of switches, high performance and dc-link voltage equal to that of standard converter with five legs. In addition, the control system is able to operate with a controlled mechanical power, allowing a bidirectional power flow. Simulated and experimental results are presented. View full abstract»

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  • Direct torque control of squirrel cage induction motor for optimum current ripple using three-level inverter

    Page(s): 904 - 914
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (851 KB)  

    Three-level neutral point clamped (NPC) inverters have been widely used in medium voltage applications. In this study, direct torque control strategy for sensorless squirrel-cage induction motor (SQIM) using NPC three-level inverter is presented. The proposed control strategy optimises the current ripple in steady state and also gives a high dynamic performance of torque in transient state. The advantage of having low dv/dt for three-level inverter output voltage is retained. The control strategy is verified on a 7.5 hp SQIM drive with three-level insulated-gate bipolar transistor (IGBT) inverter. Experimental results validate the steady state and the dynamic performance of the proposed control strategy. View full abstract»

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  • Design and performance studies of a hybrid voltage regulator with improved energy efficiency

    Page(s): 915 - 924
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (850 KB)  

    Transformer coupling in high step-down ratio voltage regulators (VR) improves their efficiency by extending the duty cycle, but results in poor dynamic performance because of their low inductor current slew rate and the leakage inductance of the transformer. Hybrid VR use an auxiliary buck converter in parallel with the main converter during load transients to improve the dynamic performance of the VR. The dynamic power loss in the auxiliary buck converter, however, severely affects the energy efficiency of the VR with increasing frequency of the load transients. This study presents the design and performance of a new control circuit proposed to minimise the dynamic power loss in the auxiliary buck converter of a hybrid voltage regulator consisting of an isolated full-bridge current doubler rectifier converter in parallel with an auxiliary buck converter. The results obtained from simulation and experimentation on a 9-19-V input, 1-V/30-A output, 500-kHz hybrid voltage regulator, designed according to the proposed method, show that the proposed control scheme significantly improves both the dynamic performance and the energy efficiency of the VR. View full abstract»

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  • H repetitive voltage control of gridconnected inverters with a frequency adaptive mechanism

    Page(s): 925 - 935
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (1361 KB)  

    A voltage controller is proposed and implemented for grid-connected inverters based on H and repetitive control techniques. A frequency adaptive mechanism is introduced to improve system performance and to cope with grid frequency variations. The repetitive control, based on the internal model principle, offers excellent performance for voltage tracking, as it can deal with a very large number of harmonics simultaneously. This leads to a very low total harmonic distortion and improved tracking performance. It turns out that the controller can be reduced to a proportional gain cascaded with the internal model (in a re-arranged form), which can be easily implemented in real applications. The proposed controller is experimentally tested to validate its performance, focusing on reducing tracking error and total harmonic distortion, under different scenarios (e.g. in the stand-alone mode or in the grid-connected mode, with or without the frequency adaptive mechanism, with linear or non-linear loads etc). View full abstract»

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  • Control current and relative stability of peak current-mode controlled pulse-width modulated dc-dc converters without slope compensation

    Page(s): 936 - 946
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (1120 KB)  

    General equation for the control current for the inner-current loop of pulse-width modulated (PWM) dc-dc power converters with peak current-mode control without slope compensation is derived. Derivations of expressions for the control current as functions of duty cycle and phase margin at power stage specifications for buck, boost and buck-boost dc-dc converters in continuous conduction mode (CCM) are presented. Relative stability of the inner-current loop without slope compensation was analysed. Experimental and Saber simulation results for a buck converter with the inner-current loop are presented to validate the theory presented. The results obtained can be used to determine the range of control voltage required by the inner loop, to select a proper value of sense resistance, and to design the control circuit in the outer-voltage loop of peak current-mode controlled PWM DC-DC converters. It is shown that the phase margin of the inner loop is 0- at a duty cycle value of 0.5 and increases as the duty cycle decreases. View full abstract»

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  • Harmonic mitigator based on 12-pulse ac-dc converter for switched mode power supply

    Page(s): 947 - 964
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (1884 KB)  

    A novel harmonic mitigator based on the 12-pulse ac-dc converter, which is capable of suppressing up to 11th harmonics, is presented with reduced magnetic rating and low total harmonic distortion (THD) of ac mains current. A set of power quality indices on input ac mains and magnetic ratings for various autoconnected transformer configurations for the 12-pulse converter feeding a low voltage, high current and 12-kW switched mode power supply is also presented so that the best autoconnected transformer configuration can be chosen according to the requirements for this application. A laboratory prototype of the proposed ac-dc converter is developed and the test results are presented to validate the design and model of the converter system. View full abstract»

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  • Buck/half-bridge input-series two-stage converter

    Page(s): 965 - 976
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (902 KB)  

    This study presents a concept of connecting two-stage DC-DC converters in an input-series connection. An application example is discussed in detail where the first stage utilises two series connected buck converters that have reduced voltage stress. A single second stage is a half-bridge converter and is able to regulate the charge balance of the first stage. The benefits of the topology include: reduced primary switch voltage stress, simple self-driven synchronous rectification for wide input voltage range, self-voltage balancing on intermediate bus capacitors and simple housekeeping power supply. Further, the topology exhibits an unusual ripple match concept that can be utilised to suppress the current ripple of the second stage. Based on the detailed analysis, prototypes with 500-700-V input and 5-V/30-A output are built. Experimental results verify the principle and performance of the new topology. View full abstract»

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  • Voltage and current unbalance compensation using a static var compensator

    Page(s): 977 - 988
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (1176 KB)  

    A three-phase insulated gate bipolar transistor (IGBT)-based static var compensator (STATCOM) is used for voltage and/or current unbalance compensation. An instantaneous power theory is adopted for real-time calculation and control. Three control schemes - current control, voltage control and integrated control - are proposed to compensate the unbalance of current, voltage or both. The compensation results of the different control schemes in unbalance cases (load current unbalance or voltage unbalance) are compared and analysed. The simulation and experimental results show that the control schemes can compensate the unbalance in load current or in the voltage source. Different compensation objectives can be achieved, that is, balanced and unity power factor source current, balanced and regulated voltage or both, by choosing appropriate control schemes. View full abstract»

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  • Inductor winding loss owing to skin and proximity effects including harmonics in non-isolated pulse-width modulated dc-dc converters operating in continuous conduction mode

    Page(s): 989 - 1000
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (792 KB)  

    A general expression for winding loss (copper loss) including harmonics for an inductor carrying periodic non-sinusoidal current is presented. The skin and proximity effects are taken into account. Expressions for amplitudes of inductor current harmonics are derived and illustrated as functions of duty cycle for selected non-isolated converters namely buck, boost and buck-boost converters. An example of inductor design procedure using the area-product method is shown for a buck converter operating in continuous conduction mode (CCM). The amplitude spectra of the inductor current, winding resistance and winding power loss are illustrated. Inductor winding losses in the designed inductor are analysed using MatLab simulations. Experimental results using the designed inductor are also presented. View full abstract»

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  • Silicon-on-insulator-based high-voltage, high-temperature integrated circuit gate driver for silicon carbide-based power field effect transistors

    Page(s): 1001 - 1009
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (800 KB)  

    Silicon carbide (SiC)-based field effect transistors (FETs) are gaining popularity as switching elements in power electronic circuits designed for high-temperature environments like hybrid electric vehicle, aircraft, well logging, geothermal power generation etc. Like any other power switches, SiC-based power devices also need gate driver circuits to interface them with the logic units. The placement of the gate driver circuit next to the power switch is optimal for minimising system complexity. Successful operation of the gate driver circuit in a harsh environment, especially with minimal or no heat sink and without liquid cooling, can increase the power-to-volume ratio as well as the power-to-weight ratio for power conversion modules such as a DC-DC converter, inverter etc. A silicon-on-insulator (SOI)-based high-voltage, high-temperature integrated circuit (IC) gate driver for SiC power FETs has been designed and fabricated using a commercially available 0.8--m, 2-poly and 3-metal bipolar-complementary metal oxide semiconductor (CMOS)-double diffused metal oxide semiconductor (DMOS) process. The prototype circuit-s maximum gate drive supply can be 40-V with peak 2.3-A sourcing/sinking current driving capability. Owing to the wide driving range, this gate driver IC can be used to drive a wide variety of SiC FET switches (both normally OFF metal oxide semiconductor field effect transistor (MOSFET) and normally ON junction field effect transistor (JFET)). The switching frequency is 20-kHz and the duty cycle can be varied from 0 to 100-. The circuit has been successfully tested with SiC power MOSFETs and JFETs without any heat sink and cooling mechanism. During these tests, SiC switches were kept at room temperature and ambient temperature of the driver circuit was increased to 200-C. The circuit underwent numerous temperature cycles with negligible performance degradation. View full abstract»

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Aims & Scope

IET Power Electronics brings together five principal power electronics themes including: applications of power semiconductor technology; circuits; devices; techniques; and performance management.

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