# IEEE Transactions on Electron Devices

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Displaying Results 1 - 25 of 50

Publication Year: 2010, Page(s):C1 - 2046
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• ### IEEE Transactions on Electron Devices publication information

Publication Year: 2010, Page(s): C2
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• ### Origin of the Flatband-Voltage Roll-Off Phenomenon in Metal/High- $k$ Gate Stacks

Publication Year: 2010, Page(s):2047 - 2056
Cited by:  Papers (30)
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The effect of flatband-voltage reduction [roll-off (R-O)], which limits fabrication options for obtaining the needed band-edge threshold voltage values in transistors with highly scaled metal/high- k dielectric gate stacks, is discussed. The proposed mechanism causing this R-O phenomenon is suggested to be associated with the generation of positively charged oxygen vacancies in the interfac... View full abstract»

• ### A Novel Characterization Scheme of $hbox{Si/SiO}_{2}$ Interface Roughness for Surface Roughness Scattering-Limited Mobilities of Electrons and Holes in Unstrained- and Strained-Si MOSFETs

Publication Year: 2010, Page(s):2057 - 2066
Cited by:  Papers (18)
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In this paper, a novel method to directly determine the surface roughness scattering-limited mobilities (μsr) of electrons and holes in Si MOSFETs from the experimental data of MOS interface roughness is proposed and compared with the experimental μsr of Si MOSFETs with and without biaxial tensile strain. This method includes the direct evaluation of the scatter... View full abstract»

• ### Effects of Substrate Orientation and Channel Stress on Short-Channel Thin SOI MOSFETs

Publication Year: 2010, Page(s):2067 - 2072
Cited by:  Papers (3)  |  Patents (1)
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We present a study of the effects of substrate orientation and longitudinal channel stress on the performance of extremely thin silicon-on-insulator (ETSOI) MOSFETs with gate lengths down to 25 nm. We find that short-channel electron and hole mobilities follow the long-channel mobility trends versus substrate orientation and longitudinal channel stress. We show that with respect to (100) silicon-o... View full abstract»

• ### Insights on Design and Scalability of Thin-BOX FD/SOI CMOS

Publication Year: 2010, Page(s):2073 - 2079
Cited by:  Papers (4)  |  Patents (1)
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Device simulations are used to gain insights on the design of nanoscale thin-buried-oxide (and ultrathin-body) fully depleted/silicon-on-insulator (SOI) CMOS and to assess its scalability toward the end of the Semiconductor Industry Association roadmap (International Technology Roadmap for Semiconductors), relative to that of FinFET CMOS. The simulation results imply, albeit with complex processin... View full abstract»

• ### Theoretical Screening of Candidate Materials for DRAM Capacitors and Experimental Demonstration of a Cubic-Hafnia MIM Capacitor

Publication Year: 2010, Page(s):2080 - 2086
Cited by:  Papers (3)
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To screen candidate materials for dynamic random-access memory capacitors, the tunneling probability at a constant equivalent oxide thickness (EOT) of metal-insulator-metal (MIM) capacitors was theoretically maximized according to a tradeoff between permittivity and band offset. As a result, it was found that cubic HfO2 with a TiN electrode is a promising candidate. TiN/Al-doped HfO View full abstract»

• ### How to Extract the Sheet Resistance and Hall Mobility From Arbitrarily Shaped Planar Four-Terminal Devices With Extended Contacts

Publication Year: 2010, Page(s):2087 - 2097
Cited by:  Papers (9)
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Van der Pauw's method enables the sheet resistance Rsq and the Hall mobility μH to be extracted from arbitrarily shaped simply connected planar samples with four peripheral pointlike contacts. This paper generalizes the method for devices with extended contacts. It is found that Rsq and μH can be extracted using only six resis... View full abstract»

• ### Crystallographic-Orientation-Dependent Gate-Induced Drain Leakage in Nanoscale MOSFETs

Publication Year: 2010, Page(s):2098 - 2105
Cited by:  Papers (23)
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The efficient and successful realization of low-power semiconductor devices demands, among other things, the ability to quantitatively model and minimize myriad leakage phenomena. We report herein a general physical model to quantitatively compute crystallographic-orientation-dependent gate-induced drain leakage (GIDL), and its numerical implementation in a continuum-based device simulator. This s... View full abstract»

• ### Compact Charge Model for Independent-Gate Asymmetric DGFET

Publication Year: 2010, Page(s):2106 - 2115
Cited by:  Papers (12)
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Analytical expressions for terminal charges of an independent-gate asymmetric double gate MOSFET (DGFET) are derived. The new charge model is C∞ continuous, valid for all bias conditions and does not involve charge-sheet approximation. This is accomplished by developing the symmetric linearization method in the form that does not require identical boundary conditions at th... View full abstract»

• ### Comprehensive Investigation of Statistical Effects in Nitride Memories—Part I: Physics-Based Modeling

Publication Year: 2010, Page(s):2116 - 2123
Cited by:  Papers (19)
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This paper presents a comprehensive investigation of statistical effects in deeply scaled nitride memory cells, considering both atomistic substrate doping and the discrete and localized nature of stored charge in the nitride layer. By means of 3-D TCAD simulations, the statistical dispersion of the threshold voltage shift induced by a single localized electron in the nitride is evaluated in prese... View full abstract»

• ### Comprehensive Investigation of Statistical Effects in Nitride Memories—Part II: Scaling Analysis and Impact on Device Performance

Publication Year: 2010, Page(s):2124 - 2131
Cited by:  Papers (13)
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This paper presents a scaling analysis of the statistical distribution of the threshold voltage shift (ΔVT) obtained by electron storage in nitride memories, considering both its average and standard deviation. For fixed density of trapped charge, the average ΔVT decreases as a consequence of fringing fields, not predictable by any 1-D simulation a... View full abstract»

• ### Barrier Lowering and Backscattering Extraction in Short-Channel MOSFETs

Publication Year: 2010, Page(s):2132 - 2137
Cited by:  Papers (13)
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In this paper, we propose a fully experimental method to extract the barrier lowering in short-channel saturated MOSFETs using the Lundstrom backscattering transport model in one-subband approximation and carrier degeneracy. The knowledge of barrier lowering at the operative bias point in the inversion regime is of fundamental importance in device scaling. At the same time, we also obtain an estim... View full abstract»

• ### Effects of Substrate Orientation on the Photovoltaic Performance of InGaAs Solar Cells

Publication Year: 2010, Page(s):2138 - 2143
Cited by:  Papers (2)
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In0.16Ga0.84As solar cells grown on GaAs substrates with different miscut angles via metalorganic chemical vapor deposition were utilized to study the effect of substrate orientation on solar cell efficiency. A p-n In0.16Ga0.84As solar cell grown on a 2°-off GaAs substrate exhibited better conversion efficiency than one grown on a 15°-off G... View full abstract»

• ### Proposal and Performance Analysis of Normally Off $hbox{n}^{++}$ GaN/InAlN/AlN/GaN HEMTs With 1-nm-Thick InAlN Barrier

Publication Year: 2010, Page(s):2144 - 2154
Cited by:  Papers (22)
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Design considerations and performance of n++ GaN/InAlN/AlN/GaN normally off high-electron mobility transistors (HEMTs) are analyzed. Selective and damage-free dry etching of the gate recess through the GaN cap down to a 1-nm-thick InAlN barrier secures positive threshold voltage, while the thickness and the doping of the GaN cap influence the HEMT direct current and microwave performanc... View full abstract»

• ### Investigation of the Electrostatic Discharge Performance of GaN-Based Light-Emitting Diodes With Naturally Textured p-GaN Contact Layers Grown on Miscut Sapphire Substrates

Publication Year: 2010, Page(s):2155 - 2162
Cited by:  Papers (7)
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The electrostatic discharge (ESD) characteristics of GaN-based light-emitting diodes (LEDs) with naturally textured p-GaN contact layers grown on c-axis miscut sapphire substrates are studied and demonstrated. Based on the machine model, the device grown on a 0.35° miscut sapphire shows the highest ESD tolerance, whereas the device grown on a 0.2° miscut sapphire exhibits the ... View full abstract»

• ### eLeNA: A Parametric CMOS Active-Pixel Sensor for the Evaluation of Reset Noise Reduction Architectures

Publication Year: 2010, Page(s):2163 - 2175
Cited by:  Papers (2)
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We present a novel complementary metal-oxide-semiconductor (CMOS) active-pixel sensor imager that incorporates different reset schemes to achieve lower reset noise levels. The sensor, eLeNA, features a 448 × 512 array with a pixel pitch of 15 μm, fabricated using a 0.18- μm CMOS process. Fourteen sections and five different reset methods were employed. Without using pinned dio... View full abstract»

• ### Per-Pixel Dark Current Spectroscopy Measurement and Analysis in CMOS Image Sensors

Publication Year: 2010, Page(s):2176 - 2182
Cited by:  Papers (9)
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A per-pixel dark current spectroscopy measurement and analysis technique for identifying deep-level traps in CMOS imagers is presented. The short integration time transfer gate subtraction experimental technique used to obtain accurate results is described and discussed. The activation energies obtained for molybdenum (≈0.3 eV), tungsten (≈0.37 eV), and the phosphorus-vacancy (E-cent... View full abstract»

• ### The Effect of Disordered Microscale Holes in the Front Dielectric Layer of AC Plasma Display Panels

Publication Year: 2010, Page(s):2183 - 2189
Cited by:  Papers (5)
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Using polymethyl methacrylate (PMMA) beads, disordered microscale holes were fabricated in the front dielectric layer of ac plasma display panels. The density of the disordered microscale holes was easily controlled by varying the weight percentage of the PMMA beads. As their density increased, the voltage of self-erasing discharge and the minimum sustain voltage decreased. In addition, the sustai... View full abstract»

• ### Investigation of Radiation Hardness of Germanium Photovoltaic Cells

Publication Year: 2010, Page(s):2190 - 2194
Cited by:  Papers (7)
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This contribution discusses the radiation hardness of germanium (Ge) photovoltaic cells under space conditions corresponding to an irradiation dose of 1-MeV 1 × 1015 cm-2 electrons. For this purpose, different germanium photovoltaic cell technologies based on p-type substrates are analyzed. The investigation comprises standard Ge photovoltaic cells with a substrate dop... View full abstract»

• ### Structure and Ultraviolet Electroluminescence of $n hbox{-ZnO/SiO}_{2}hbox{-ZnO}$ Nanocomposite/$p$ -GaN Heterostructure Light-Emitting Diodes

Publication Year: 2010, Page(s):2195 - 2202
Cited by:  Papers (10)
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We fabricated and characterized ultraviolet (UV) light-emitting diodes (LEDs) composed of n-ZnO/SiO2-ZnO nanocomposite/p-GaN heterostructures. Significant UV electroluminescence at 387 nm from the n-ZnO layer in this heterostructure LED was observed at a forward-bias current of as low as 1.8 mA. This is ascribed to the high quality of the n-ZnO layer and the ... View full abstract»

• ### Optimized Thermal Management From a Chip to a Heat Sink for High-Power GaN-Based Light-Emitting Diodes

Publication Year: 2010, Page(s):2203 - 2207
Cited by:  Papers (29)
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To improve heat dissipation of sapphire-based LEDs, we develop a new LED package with a dual heat spreader design. The first heat spreader is a cup-shaped copper sheet, which was directly contacted with sapphire to enhance heat dissipation of the chip itself. The second heat spreader is the die-bonding material of diamond-added AgSnCu solder and a high thermal conductive metal-core printed circuit... View full abstract»

• ### Adaptive Local Dimming Lighting of Mercury-Free Flat Fluorescent Lamp Using Dual Auxiliary Electrode

Publication Year: 2010, Page(s):2208 - 2212
Cited by:  Papers (1)
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A new drive method designed for the adaptive local dimming lighting of a multistructured 32-in diagonal-sized mercury-free flat fluorescent lamp (MFFL) which consists of a matrix array of 10 × 16 60-mm diagonal-sized unit cells is proposed. The adoption of the dual auxiliary electrode and the bipolar-pulse drive scheme resulted in a wide stable operating voltage margin at low driving voltag... View full abstract»

• ### Simulation and Measurements of Stray Minority Carrier Protection Structures in CMOS Image Sensors

Publication Year: 2010, Page(s):2213 - 2220
Cited by:  Papers (2)
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Recently, the rapid growth of CMOS technology has made it possible to integrate more periphery circuits into a CMOS image sensor. Although these periphery circuits improve image quality, they also lead to the generation of more stray minority carriers. Because the number of stray minority carriers is proportional to the frequency, the affected region increases with increasing operating frequency. ... View full abstract»

• ### Manipulating the Microcavity Structure for Highly Efficient Inverted Top-Emitting Organic Light-Emitting Diodes: Simulation and Experiment

Publication Year: 2010, Page(s):2221 - 2226
Cited by:  Papers (5)
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A comprehensive theoretical and experimental study on inverted top-emitting organic light-emitting diodes (ITOLEDs) with a microcavity structure is demonstrated. In the ITOLEDs, tris-(8-hydroxyquinoline) aluminum (Alq3) is used as the emitting material and the outcoupling capping layer, and the 2, 9-dimethyl-4, 7-diphenyl-1, 10-phenanthroline is used as the hole/exciton-blocking layer t... View full abstract»

## Aims & Scope

IEEE Transactions on Electron Devices publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects.

Full Aims & Scope

## Meet Our Editors

Editor-in-Chief

Giovanni Ghione
Politecnico di Torino,
10129 Torino, Italy