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Circuits, Devices & Systems, IET

Issue 4 • Date July 2010

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Displaying Results 1 - 8 of 8
  • Design and analysis of pulse-width modulation-based two-stage current-mode multi-phase voltage doubler

    Page(s): 269 - 281
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (1407 KB)  

    A new closed-loop switched-capacitor (SC) converter of two-stage current-mode multi-phase voltage doubler (CMPVD) is presented by combining multi-phase operation and pulse-width modulation (PWM) technique for low-power DC-DC step-up conversion and output current regulation. This CMPVD is composed of two voltage doublers and one constant current source in series. The voltage doublers are in charge of boosting voltage, and are combined with multi-phase operation to obtain the higher voltage gain by the least number of pumping capacitors. The current source is adopted for supplying a constant current at output terminal, and is combined with PWM to reinforce output regulation as well as robustness against source/loading variation. Further, the relevant theoretical analysis and design include CMPVD model, steady-state/dynamic analysis, power efficiency, conversion ratio, output ripple, source lower bound, capacitance and current source selection, stability and closed-loop control. Finally, the closed-loop CMPVD is designed and simulated, and the hardware implementation is realised and tested. All the results are illustrated to show the efficacy of the proposed scheme. View full abstract»

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  • Behaviour modelling of wideband RF transmitters using Hammerstein-Wienermodels

    Page(s): 282 - 290
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (338 KB)  

    The authors concern the application and use of a class of block-oriented systems, known as Hammerstein-Wiener, to model the dynamic non-linear behaviour of radio frequency (RF) transmitters. This class of system models is found to better mimic strong dynamic non-linear systems, as compared to simpler individual Hammerstein and Wiener models. The identification, which may look complicated at first glance, is skillfully tackled in an iterative two-stage identification approach by applying a class of global pattern search techniques along with the Narendra-Gallman method. The number of parameters processed at each iteration is therefore reduced, which considerably facilitates the progress and convergence of the identification algorithm. The model is identified and validated for two classes of power amplifiers. The validation results are obtained for various orders and are compared to the results of memory polynomial models. The Hammerstein-Wiener model achieves comparable results with a much lower level of complexity, in terms of the number of parameters associated with the model. View full abstract»

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  • Efficient modulo 2n + 1 multipliers for diminished-1 representation

    Page(s): 291 - 300
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (654 KB)  

    An efficient architecture for diminished-1 modulo (2n+1) multipliers is described. The new architecture is built using a pure radix-4 Booth recoding block, an inverted end-around-carry carry save adder tree and a final diminished-1 adder. Although one correction term is used, the complexity of the circuit is very simple. There are n/2 partial products (PP), one simple correction term and one constant, each one n bits wide. The new multipliers can handle zero inputs and results. The analytical and experimental results indicate that the new multipliers offer better speed and more compact than previously published solutions. View full abstract»

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  • Adiabatic charging and discharging method with minimum energy dissipation for a variable-gap capacitor system

    Page(s): 301 - 311
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (558 KB)  

    This study considers a method for minimising the energy dissipation when charging a variable-gap capacitor. The authors assume a capacitor coupled with repulsive mechanical potential energy. The potential energy is proportional to 1/dn, where d is the plate distance. With this capacitor model, the authors use the method of Lagrange multipliers to investigate a way to minimise the energy dissipation. When n = 3 (Q = pV2 is satisfied in this case), the authors confirm that the conventional equal-step charging does not minimise the energy dissipation. From the viewpoint of the charge transfer per step, conventional constant-charge-transfer charging does not minimise the energy dissipation, but increasing-charge-transfer charging (small charge transfer at the initial step and large charge transfer at the final step) does minimise the energy dissipation. From analyses of the charging and discharging processes, it becomes clear that the ratio of energy dissipations between the conventional and proposed methods approaches 0.89 when the step number increases. This means the proposed method reduces the energy dissipation by 11% compared with the conventional one. A circuit that enables the minimum energy dissipation as discussed above is also described. View full abstract»

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  • Topological emulation of continuous-time passive prototypes using wave port adaptors

    Page(s): 312 - 326
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (1512 KB)  

    A novel systematic method for designing high-order wave active filters is proposed in this study. This is based on an appropriate description of both the behaviour of passive elements and the topology of the prototype filter using the wave variables. The fulfillment of the Kirchhoff's laws is achieved by employing wave port adaptors. The proposed realisation of the topological emulation of prototype filter is performed using current-mirrors as active elements. This is originated from the fact that summation/subtraction and scaling operations are required for the realisation of wave port adaptors. An attractive characteristic of the proposed method is that the derivation of high-order filters is a one-step procedure because of the availability of the wave active equivalents of passive elements and adaptors. A third-order elliptic filter has been designed in AMS 0.35 μm CMOS process and its performance has been evaluated and compared through simulation results. View full abstract»

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  • Modelling of power metal-oxide semiconductor field-effect transistor for the analysis of switching characteristics in half-bridge converters

    Page(s): 327 - 336
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (821 KB)  

    Considering the power metal-oxide semiconductor field-effect transistor (MOSFET) parasitic elements, the switching characteristics of half-bridge converters are analysed. First, the switching operation process of the converter is discussed, including Cdv/dt induced voltage, turn-on and turn-off transient and drain-source voltage oscillations. Then an analytical model of power MOSFET is deduced and validated. Based on the model and Saber software, the switching characteristics of half-bridge converters are simulated with different values of parasitic elements. Finally, according to the simulation results, the design optimisations are presented, and an experimental prototype is used to validate the proposed approach. View full abstract»

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  • Modelling of doping-dependent subthreshold swing of symmetric double-gate MOSFETs

    Page(s): 337 - 345
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (607 KB)  

    A simple, yet efficient two-dimensional (2D) model for the doping-dependent subthreshold swing characteristics of symmetric double-gate (DG) MOSFETs has been presented. The 2D Poisson's equation has been solved by using parabolic potential approximation method to obtain the 2D channel potential function of the device. A closed-form expression for the doping-dependent effective current conducting path distance (deff) measured with respect to the centre of the channel of the symmetric DG MOSFET has been presented. Finally, the closed-form expression of the conducting path distance parameter deff has been utilised to obtain the subthreshold swing model of the device. The validity of the proposed model has been shown by comparing the analytical results with numerical simulation data obtained by using the commercially available ATLAS™ device simulator. View full abstract»

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  • Current-mode operational transconductance amplifier-capacitor biquad filter structures based on Tarmy-Ghausi Active-RC filter and second-order digital all-pass filters

    Page(s): 346 - 364
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (1031 KB)  

    The Tarmy-Ghausi (TG) active resistor-capacitor (RC) filters using op-amps and its modification by Moschytz are well known to active RC filter designers. These use first-order all-pass networks in a negative feedback loop. New current-mode universal operational transconductance amplifier-capacitor (OTA-C) biquad filters based on the TG active RC filter are considered here. These are based on a recently proposed OTA-C based first-order all-pass network. Three different feedback arrangements are investigated in the proposed filter structure so as to reduce the pole-Q sensitivity. The proposed biquad filters are shown to implement all different types of filters like low-pass, high-pass, band-pass, symmetric notch, all-pass, low-pass notch and high-pass notch. The synthesis of the general biquad is carried out in a novel way by invoking the analogy with direct-form digital filter structures. The special case of all-pass filter realisation derived from the proposed universal filter needs additional hardware for realising the feed-forward coefficients. Hence alternative OTA-C based all-pass filter implementations based on Mitra-Hirano and Gray-Markel second-order digital filter structures are derived in which the coefficients that are used to realise the denominator are shared in the realisation of numerator also. All the proposed circuits are compared with the other structures available in the literature. The simulation results of the proposed circuits are also presented. View full abstract»

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Aims & Scope

IET Circuits, Devices & Systems covers circuit theory and design, circuit analysis and simulation, computer aided design,  filters, circuit implementations, cells and architectures for integration.

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