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IEEE Transactions on Computers

Issue 8 • Aug. 2010

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Displaying Results 1 - 17 of 17
  • [Front cover]

    Publication Year: 2010, Page(s): c1
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  • [Inside front cover]

    Publication Year: 2010, Page(s): c2
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  • High-Radix Multiplier-Dividers: Theory, Design, and Hardware

    Publication Year: 2010, Page(s):1009 - 1022
    Cited by:  Papers (7)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1780 KB) | HTML iconHTML

    This paper describes the theory and design of digital high-radix multiplier-dividers (Patent Pending). The theory of high-radix division is extended to high-radix multiplier-dividers that can perform fused multiplication and division operations using a single recurrence relation. With the fused implementation of multiplication and division, the two operations can be executed using a single instruc... View full abstract»

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  • Checking Completeness of Tests for Finite State Machines

    Publication Year: 2010, Page(s):1023 - 1032
    Cited by:  Papers (13)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (837 KB) | HTML iconHTML

    In testing from a Finite State Machine (FSM), the generation of test suites which guarantee full fault detection, known as complete test suites, has been a long-standing research topic. In this paper, we present conditions that are sufficient for a test suite to be complete. We demonstrate that the existing conditions are special cases of the proposed ones. An algorithm that checks whether a given... View full abstract»

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  • Power and Performance Trade-Offs in Contemporary DRAM System Designs for Multicore Processors

    Publication Year: 2010, Page(s):1033 - 1046
    Cited by:  Papers (16)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (4221 KB) | HTML iconHTML

    DRAM memory is playing an increasingly important role in the overall power profile of latest-generation servers with multicore processors. With many power saving techniques adopted into processor design, memory power consumption can now exceed processor power consumption when a system runs memory-intensive workloads. There is an urgent need to fully evaluate the memory power profile of contemporar... View full abstract»

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  • Scratchpad Memory Management Techniques for Code in Embedded Systems without an MMU

    Publication Year: 2010, Page(s):1047 - 1062
    Cited by:  Papers (12)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (4225 KB) | HTML iconHTML

    We propose a code scratchpad memory (SPM) management technique with demand paging for embedded systems that have no memory management unit. Based on profiling information, a postpass optimizer analyzes and optimizes application binaries in a fully automated process. It classifies the code of the application including libraries into three classes based on a mixed integer linear programming formulat... View full abstract»

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  • Garbage Collection for Flexible Hard Real-Time Systems

    Publication Year: 2010, Page(s):1063 - 1075
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2602 KB) | HTML iconHTML

    Hard real-time systems always choose not to use garbage collection in order to avoid its unpredictable executions. Much effort has been expended trying to build predictable garbage collectors which can provide both temporal and spatial guarantees. Unfortunately, most existing work leads to systems that cannot easily achieve a balance between temporal and spatial performances. Moreover, the schedul... View full abstract»

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  • Stateless Multicasting in Mobile Ad Hoc Networks

    Publication Year: 2010, Page(s):1076 - 1090
    Cited by:  Papers (29)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2231 KB) | HTML iconHTML

    There are increasing interest and big challenges in designing a scalable and robust multicast routing protocol in a mobile ad hoc network (MANET) due to the difficulty in group membership management, multicast packet forwarding, and the maintenance of multicast structure over the dynamic network topology for a large group size or network size. In this paper, we propose a novel Robust and Scalable ... View full abstract»

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  • Heuristics for Flexible CMP Synthesis

    Publication Year: 2010, Page(s):1091 - 1104
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1732 KB) | HTML iconHTML

    Flexible Chip Multiprocessor (CMP) systems are implemented on field programmable devices to exploit both task-level parallelism and architecture customization for parallel programs. The idea is to simultaneously allocate processor resources, map and schedule tasks to them, and to allocate one or several intertask communication resources such that the throughput or execution time is optimized. The ... View full abstract»

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  • An Improved Algorithm for the Construction of Decision Diagrams by Rearranging and Partitioning the Input Cube Set

    Publication Year: 2010, Page(s):1105 - 1119
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (4367 KB) | HTML iconHTML

    Decision diagrams (DDs) are a data structure that allows compact representation of discrete functions. The efficient construction of DDs in terms of space and time is often considered problem. A particular problem is that during the construction of a DD, a large number of temporary nodes are created. We address this problem in the case when the functions are specified in the PLA format. A common p... View full abstract»

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  • Secure and Efficient Broadcast Authentication in Wireless Sensor Networks

    Publication Year: 2010, Page(s):1120 - 1133
    Cited by:  Papers (27)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1095 KB) | HTML iconHTML Multimedia Media

    Authenticated broadcast, enabling a base station to send commands and requests to low-powered sensor nodes in an authentic manner, is one of the core challenges for securing wireless sensor networks. μTESLA and its multilevel variants based on delayed exposure of one-way chains are well known valuable broadcast authentication schemes, but concerns still remain for their practical applicatio... View full abstract»

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  • A Reduced Complexity Wallace Multiplier Reduction

    Publication Year: 2010, Page(s):1134 - 1137
    Cited by:  Papers (28)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1145 KB) | HTML iconHTML

    Wallace high-speed multipliers use full adders and half adders in their reduction phase. Half adders do not reduce the number of partial product bits. Therefore, minimizing the number of half adders used in a multiplier reduction will reduce the complexity. A modification to the Wallace reduction is presented that ensures that the delay is the same as for the conventional Wallace reduction. The mo... View full abstract»

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  • Automatic Refinement Checking of Pipelines with Out-of-Order Execution

    Publication Year: 2010, Page(s):1138 - 1144
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1338 KB) | HTML iconHTML

    We show how to automatically verify pipelined machines with out-of-order execution using refinement. Our notion of refinement is based on Well-Founded Equivalence Bisimulations. Proving refinement guarantees that a pipelined machine will preserve all safety and liveness properties of its instruction set architecture. Checking liveness—used to ensure that deadlocks do not occur, i.e., there... View full abstract»

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  • Word-Based Montgomery Modular Multiplication Algorithm for Low-Latency Scalable Architectures

    Publication Year: 2010, Page(s):1145 - 1151
    Cited by:  Papers (24)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2061 KB) | HTML iconHTML

    Modular multiplication is a crucial operation in public key cryptosystems like RSA and elliptic curve cryptography (ECC). This paper presents a new word-based Montgomery modular multiplication algorithm which can be used to achieve a low-latency scalable architecture for efficient hardware implementations. We show how to relax the data dependency in conventional word-based algorithms so that a lat... View full abstract»

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  • New OnlinePlus Publication Model Beginning in 2010

    Publication Year: 2010, Page(s): 1152
    Request permission for commercial reuse | PDF file iconPDF (225 KB)
    Freely Available from IEEE
  • TC Information for authors

    Publication Year: 2010, Page(s): c3
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    Freely Available from IEEE
  • [Back cover]

    Publication Year: 2010, Page(s): c4
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Aims & Scope

The IEEE Transactions on Computers is a monthly publication with a wide distribution to researchers, developers, technical managers, and educators in the computer field.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief
Paolo Montuschi
Politecnico di Torino
Dipartimento di Automatica e Informatica
Corso Duca degli Abruzzi 24 
10129 Torino - Italy
e-mail: pmo@computer.org