# IEEE Transactions on Electron Devices

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Displaying Results 1 - 25 of 34

Publication Year: 2010, Page(s):C1 - C4
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• ### IEEE Transactions on Electron Devices publication information

Publication Year: 2010, Page(s): C2
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• ### Analytical Modeling of High-Frequency Noise Including Temperature Effects in GaN HEMTs on High-Resistivity Si Substrates

Publication Year: 2010, Page(s):1485 - 1491
Cited by:  Papers (11)
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In this paper, analytical modeling of high-frequency noise was carried out including temperature effects in AlGaN/GaN high electron mobility transistors (HEMTs) on high-resistivity Si substrates over a wide temperature range from -50°C to 200°C. The device's microwave S-parameters and overall noise parameters, including minimum noise figure (NFmin), equivalent noise resist... View full abstract»

• ### Off-State Breakdown Characterization in AlGaN/GaN HEMT Using Drain Injection Technique

Publication Year: 2010, Page(s):1492 - 1496
Cited by:  Papers (27)
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AlGaN/GaN high-electron mobility transistor's (HEMT's) off-state breakdown is investigated using drain-current injection techniques with different injection current levels. Competitions between the source leakage and gate leakage, pure leakage and impact ionization, and source- and gate-injection-induced impact ionization during the drain-injection measurement are discussed in detail. It was found... View full abstract»

• ### AlGaN/GaN HEMTs on (001) Silicon Substrate With Power Density Performance of 2.9 W/mm at 10 GHz

Publication Year: 2010, Page(s):1497 - 1503
Cited by:  Papers (16)
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AlGaN/GaN High Electron Mobility Transistors (HEMT) on a (001)-oriented silicon (Si) substrate are fabricated. The device with a gate length of 300 nm and a total gate periphery of 300 μm exhibits a maximum dc drain current density of 600 mA/mm at VGS = 0 V with an extrinsic transconductance (gm) of about 200 mS/mm. An extrinsic current gain cutoff frequency (ft View full abstract»

• ### Scalability of Sub-100 nm InAs HEMTs on InP Substrate for Future Logic Applications

Publication Year: 2010, Page(s):1504 - 1511
Cited by:  Papers (34)  |  Patents (1)
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We have experimentally studied the scaling behavior of sub-100-nm InAs high-electron mobility transistors (HEMTs) on InP substrate from the logic operation point of view. These devices have been designed for scalability and combine a thin InAlAs barrier and a thin channel containing a pure InAs subchannel. InAs HEMTs with gate length down to 40 nm exhibit excellent logic figures of merit, such as ... View full abstract»

• ### Effects of Negative-Bias Operation and Optical Stress on Dark Current in CMOS Image Sensors

Publication Year: 2010, Page(s):1512 - 1518
Cited by:  Papers (14)
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A negative-bias operation of the transfer gate has revealed a major origin of dark current defects of CMOS image sensors. Charge injection from the photodiode to the substrate at the negative-bias operation has been avoided by an improved well structure. A strong visible light has been observed to cause damage with an increase in the dark current under the normal operating condition, and the damag... View full abstract»

• ### Effects of $hbox{CF}_{4}$ Plasma Treatment on the Electrical Characteristics of Poly-Silicon TFTs Using a $hbox{Tb}_{2}hbox{O}_{3}$ Gate Dielectric

Publication Year: 2010, Page(s):1519 - 1526
Cited by:  Papers (11)
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In this paper, we developed high-k Tb2O3 poly-Si thin-film transistors (TFTs) using different CF4 plasma power treatments. The high-k Tb2O3 poly-Si TFT device with a 20-W plasma power exhibited better electrical characteristics in terms of a highly effective carrier mobility, a high-driving current, a low-threshold voltage, a small subthreshol... View full abstract»

• ### Impact of Scaling on Neutron-Induced Soft Error in SRAMs From a 250 nm to a 22 nm Design Rule

Publication Year: 2010, Page(s):1527 - 1538
Cited by:  Papers (165)  |  Patents (1)
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Trends in terrestrial neutron-induced soft-error in SRAMs from a 250 nm to a 22 nm process are reviewed and predicted using the Monte-Carlo simulator CORIMS, which is validated to have less than 20% variations from experimental soft-error data on 180-130 nm SRAMs in a wide variety of neutron fields like field tests at low and high altitudes and accelerator tests in LANSCE, TSL, and CYRIC. The foll... View full abstract»

• ### A Generalized Drift-Diffusion Model for Rectifying Schottky Contact Simulation

Publication Year: 2010, Page(s):1539 - 1547
Cited by:  Papers (6)
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We present a discussion on the modeling of Schottky barrier rectifying contacts (diodes) within the framework of partial-differential-equation-based physical simulations. We propose a physically consistent generalization of the drift-diffusion model to describe the boundary layer close to the Schottky barrier where thermionic emission leads to a non-Maxwellian carrier distribution, including a nov... View full abstract»

• ### Study of P/E Cycling Endurance Induced Degradation in SANOS Memories Under NAND (FN/FN) Operation

Publication Year: 2010, Page(s):1548 - 1558
Cited by:  Papers (4)
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Program/Erase (P/E) cycling endurance in poly-Si/Al2O3/SiN/SiO2/Si (SANOS) memories is systematically studied. Cycling-induced trap generation, memory window (MW) closure, and eventual stack breakdown are shown to be strongly influenced by the material composition of the silicon nitride (SiN) charge trap layer. P/E pulsewidth and amplitude, as well as starting prog... View full abstract»

• ### Modeling Nonquasi-Static Effects in SiGe HBTs

Publication Year: 2010, Page(s):1559 - 1566
Cited by:  Papers (8)
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The shortcomings of quasi-static and partitioned charge-based models are quantitatively demonstrated for 1-D SiGe heterojunction bipolar transistors. This points out the need to include higher order frequency-dependent terms, i.e., nonquasi-static effects in the model. Three different implementation-suitable modeling approaches are presented with associated formulations. Detailed comparison with t... View full abstract»

• ### A Low-Field Mobility Model for Bulk, Ultrathin Body SOI and Double-Gate n-MOSFETs With Different Surface and Channel Orientations—Part I: Fundamental Principles

Publication Year: 2010, Page(s):1567 - 1574
Cited by:  Papers (9)
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An easy-to-implement electron mobility model that accurately predicts low-field mobility in the channel of bulk MOSFETs and UTB-SOI FETs fabricated on different crystal orientations is developed. The model accounts for the influence of surface orientation and in-plane current-flow direction on effective masses, subband repopulation, and scattering rates. The paper is divided into two parts. In Par... View full abstract»

• ### A Low-Field Mobility Model for Bulk, Ultrathin Body SOI and Double-Gate n-MOSFETs With Different Surface and Channel Orientations—Part II: Ultrathin Silicon Films

Publication Year: 2010, Page(s):1575 - 1582
Cited by:  Papers (7)
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In this paper, together with the accompanying Part I, an easy-to-implement electron mobility model that accurately predicts low-field mobility in bulk MOSFETs and UTB-SOI FETs fabricated on different crystal orientations is developed. In Part I, the general features of the model have been presented. In this Part II, the effects induced by extremely small silicon thicknesses are addressed. These ef... View full abstract»

• ### A Novel Physics-Based Compact Model of Band-to-Band Tunneling Current in p-n Junctions

Publication Year: 2010, Page(s):1583 - 1589
Cited by:  Papers (1)
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A physics-based compact model of band-to-band tunneling (BtBT) current in p-n junctions is presented in this paper. The model features a smooth transition to zero forward-bias tunneling current, a full physical temperature scaling, and an innovative parametrization. We present an accurate experimental verification of the physical temperature scaling rules for BtBT on carefully selected state-of-th... View full abstract»

• ### Analysis of TANOS Memory Cells With Sealing Oxide Containing Blocking Dielectric

Publication Year: 2010, Page(s):1590 - 1596
Cited by:  Papers (7)
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In this paper, we investigate the specific impact of an additional silicon oxide layer (sealing oxide) on top of the charge-trap nitride on the electrical performance of small-dimension and large TANOS charge-trapping (CT) memory cells. We observe a significant improvement in charge retention on both our target 48-nm NAND TANOS cells and on large 5 μm long and wide memory cells. However, er... View full abstract»

• ### Relation Between the Mobility, $hbox{1}/f$ Noise, and Channel Direction in MOSFETs Fabricated on (100) and (110) Silicon-Oriented Wafers

Publication Year: 2010, Page(s):1597 - 1607
Cited by:  Papers (16)
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A study of the impact of the channel direction over the effective mobility and the 1/f noise in MOSFETs fabricated on (100) and (110) silicon-oriented wafers finding its outcome in the fabrication of future nonplanar device structures has been done. We found that, apart from a slight enhancement of the effective mobility maximum for the p-MOSFETs with a channel along the 100 direction, the channel... View full abstract»

• ### In Situ Doped Source/Drain for Performance Enhancement of Double-Gated Poly-Si Nanowire Transistors

Publication Year: 2010, Page(s):1608 - 1615
Cited by:  Papers (10)
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A poly-Si nanowire (NW) thin-film transistor configured with the double-gated scheme was fabricated and characterized. The fabrication process features the clever use of selective plasma etching to form a rectangular NW underneath a hard mask. In this paper, we show that replacing the original ion-implanted poly-Si with in situ doped poly-Si for the source/drain significantly enhances the d... View full abstract»

• ### Analytical Model of One-Dimensional Carbon-Based Schottky-Barrier Transistors

Publication Year: 2010, Page(s):1616 - 1625
Cited by:  Papers (18)
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Nanotransistors typically operate in far-from-equilibrium (FFE) conditions, which cannot be described neither by drift diffusion nor by purely ballistic models. In carbon-based nanotransistors, source and drain contacts are often characterized by the formation of Schottky barriers (SBs), with strong influence on transport. In this paper, we present a model for 1-D field-effect transistors, taking ... View full abstract»

• ### Variability in Si Nanowire MOSFETs Due to the Combined Effect of Interface Roughness and Random Dopants: A Fully Three-Dimensional NEGF Simulation Study

Publication Year: 2010, Page(s):1626 - 1635
Cited by:  Papers (30)
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In this paper, we study the impact of surface roughness and its combination with random discrete dopants on the current variability in nanometer-scale nanowire metal-oxidesemiconductor field-effect transistors. It is shown that these two variability sources cannot be regarded as independent in their effect on transport. Interface roughness results in body thickness fluctuations and scattering, whi... View full abstract»

• ### High-Voltage-Tolerant ESD Clamp Circuit With Low Standby Leakage in Nanoscale CMOS Process

Publication Year: 2010, Page(s):1636 - 1641
Cited by:  Papers (17)
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For system-on-chip applications with mixed-voltage I/O interfaces, I/O circuits with low-voltage devices must drive or receive high-voltage signals to communicate with other circuit blocks. With the consideration of low standby leakage in nanoscale CMOS processes, a new 2 × VDD-tolerant electrostatic discharge (ESD) clamp circuit by using only 1 × VDD devices wa... View full abstract»

• ### A Methodology for Extraction of the Density of Interface States in the Presence of Frequency Dispersion via the Conductance Technique

Publication Year: 2010, Page(s):1642 - 1650
Cited by:  Papers (3)
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The density of interface states in the presence of significant frequency dispersion arising from parasitic effects is extracted via the conductance technique. A complete electrical model is presented to highlight the complex nature of parasitic effects, which cannot be explained by conventional models. This technique is successfully applied to MOS capacitors with identical layers of HfO2 View full abstract»

• ### The Impact of Repetitive Unclamped Inductive Switching on the Electrical Parameters of Low-Voltage Trench Power nMOSFETs

Publication Year: 2010, Page(s):1651 - 1658
Cited by:  Papers (20)
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The impact of hot-carrier injection (HCI) due to repetitive unclamped inductive switching (UIS) on the electrical performance of low-voltage trench power n-type MOSFETs (nMOSFETs) is assessed. Trench power nMOSFETs with 20- and 30-V breakdown voltage ratings in TO-220 packages have been fabricated and subjected to over 100 million cycles of repetitive UIS with different avalanche currents IAV... View full abstract»

• ### Static Zero-Power-Consumption Coplanar Waveguide Embedded DC-to-RF Metal-Contact MEMS Switches in Two-Port and Three-Port Configuration

Publication Year: 2010, Page(s):1659 - 1669
Cited by:  Papers (20)
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This paper reports on novel electrostatically actuated dc-to-RF metal-contact microelectromechanical systems (MEMS) switches, featuring a minimum transmission line discontinuity since the whole switch mechanism is completely embedded inside the signal line of a low-loss 3-D micromachined coplanar waveguide. Furthermore, the switches are based on a multistable interlocking mechanism resulting in st... View full abstract»

• ### Implementation of a Monolithic Single Proof-Mass Tri-Axis Accelerometer Using CMOS-MEMS Technique

Publication Year: 2010, Page(s):1670 - 1679
Cited by:  Papers (50)
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This paper presents a novel single proof-mass tri-axis capacitive type complementary metal oxide semiconductor-microelectromechanical system accelerometer to reduce the footprint of the chip. A serpentine out-of-plane (Z-axis) spring is designed to reduce cross-axis sensitivity. The tri-axis accelerometer has been successfully implemented using the TSMC 2P4M process and in-house postprocessing. Th... View full abstract»

## Aims & Scope

IEEE Transactions on Electron Devices publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects.

Full Aims & Scope

## Meet Our Editors

Editor-in-Chief

Giovanni Ghione
Politecnico di Torino,
10129 Torino, Italy