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Circuits and Systems II: Express Briefs, IEEE Transactions on

Issue 1 • Date Jan. 2010

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Displaying Results 1 - 20 of 20
  • Table of contents

    Publication Year: 2010 , Page(s): C1
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  • IEEE Transactions on Circuits and Systems—II: Express Briefs publication information

    Publication Year: 2010 , Page(s): C2
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  • The Effects of Flying-Adder Clocks on Digital-to-Analog Converters

    Publication Year: 2010 , Page(s): 1 - 5
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (313 KB) |  | HTML iconHTML  

    This brief presents the theoretical and simulation results of the effects of flying-adder (FA) clocks on digital-to-analog converters (DACs). A closed-form expression for the frequency spectrum of the DAC output is derived. Analyses show that there exists a lower bound of the clock frequency above which the FA clock does not introduce any additional frequency components in the DAC output. For an F... View full abstract»

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  • Linearization of Power Amplifiers Using the Reverse MM-LINC Technique

    Publication Year: 2010 , Page(s): 6 - 10
    Cited by:  Papers (11)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (414 KB) |  | HTML iconHTML  

    A new mode-multiplexing linear amplification with nonlinear components (MM-LINC) technique is proposed in this brief. This technique, which is referred to as reverse MM-LINC, consists of using linear amplification with nonlinear components (LINC) hardware, along with two signal decomposition modes, depending on the power of the input signal. This decomposition guarantees acceptable linearity of th... View full abstract»

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  • A 10-MS/s-to-100-kS/s Power-Scalable Fully Differential CBSC 10-Bit Pipelined ADC With Adaptive Biasing

    Publication Year: 2010 , Page(s): 11 - 15
    Cited by:  Papers (5)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (658 KB) |  | HTML iconHTML  

    A 10-MS/s-to-100-kS/s power-scalable fully differential comparator-based switched-capacitor (CBSC) 10-bit pipelined analog-to-digital converter (ADC) is presented. To operate over a wide range of sampling rates, an adaptive biasing technique is proposed to enhance both linearity and signal-to-noise-plus-distortion ratio (SNDR) at low sampling rates. This ADC has been fabricated in a 0.18-??m stand... View full abstract»

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  • A Rapid Power-Switchable Track-and-Hold Amplifier in 90-nm CMOS

    Publication Year: 2010 , Page(s): 16 - 20
    Cited by:  Papers (6)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (529 KB) |  | HTML iconHTML  

    This brief presents the design and implementation of a high-speed and high-accuracy power-switchable track-and-hold (T/H) in 90-nm CMOS that achieves a total harmonic distortion of - 60 dB at 100 MS/s. With the proposed power-switching (P-S) technique, the T/H amplifier obtains not only further power optimization but also enhanced sampling speed and accuracy. The P-S technique requires no extra vo... View full abstract»

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  • Low Area/Power Synthesis Using Hybrid Pass Transistor/CMOS Logic Cells in Standard Cell-Based Design Environment

    Publication Year: 2010 , Page(s): 21 - 25
    Cited by:  Papers (1)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (779 KB) |  | HTML iconHTML  

    This brief presents a logic synthesis flow that depends on the popular Synopsys Design Compiler to perform logic translation and minimization based on the standard cell library with both pass transistor logic (PTL) and CMOS logic cells. The hybrid PTL/CMOS logic synthesis can generate appropriate circuits considering various design constraints. The proposed multilevel PTL logic cells are automatic... View full abstract»

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  • A Generalized Mixed-Radix Algorithm for Memory-Based FFT Processors

    Publication Year: 2010 , Page(s): 26 - 30
    Cited by:  Papers (11)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (460 KB) |  | HTML iconHTML  

    In this brief, a generalized mixed-radix (GMR) algorithm is proposed for memory-based fast Fourier transform (FFT) processors to support prime-sized and traditional 2n -point FFTs simultaneously. It transforms the index to a multidimensional vector for efficient computation. By controlling the index vector to satisfy the ??vector reverse?? behavior, the GMR algorithm can support not only in... View full abstract»

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  • A Self-Disabled Sensing Technique for Content-Addressable Memories

    Publication Year: 2010 , Page(s): 31 - 35
    Cited by:  Papers (5)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (856 KB) |  | HTML iconHTML  

    A low-power content-addressable memory (CAM) using a differential match line (ML) sense amplifier is proposed in this work. The proposed self-disabled sensing technique can choke the charge current fed into the ML right after the matching comparison is generated. Instead of using typical nor/ nand-type CAM cells with the single-ended ML, the proposed novel nand CAM cell with the differential ML de... View full abstract»

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  • A Scaling Parameter Approach to Delay-Dependent State Estimation of Delayed Neural Networks

    Publication Year: 2010 , Page(s): 36 - 40
    Cited by:  Papers (7)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (275 KB) |  | HTML iconHTML  

    This brief is concerned with studying the delay-dependent state estimation problem of recurrent neural networks with time-varying delay. The neuron activation function is more general than the sigmoid functions, and the time-varying delay is allowed to vary fast with time. A scaling parameter based approach is proposed, and a delay-dependent criterion is derived under which the resulting error sys... View full abstract»

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  • Improved Robust Stability Criteria for Delayed Cellular Neural Networks via the LMI Approach

    Publication Year: 2010 , Page(s): 41 - 45
    Cited by:  Papers (14)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (133 KB) |  | HTML iconHTML  

    Uniqueness and robust exponential stability are analyzed for a class of uncertain cellular neural networks with time-varying delays. By dividing the variation interval of the time delay into two subintervals with equal length, a novel Lyapunov-Krasovskii functional is introduced. Using the free-weighting matrix method, a new delay-dependent stability criterion is obtained, which is less conservati... View full abstract»

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  • Synchronization in Complex Dynamical Networks With Random Sensor Delay

    Publication Year: 2010 , Page(s): 46 - 50
    Cited by:  Papers (19)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (129 KB) |  | HTML iconHTML  

    This brief proposes a new complex dynamical network model, in which nodes are connected by measured outputs experiencing the random sensor delay. This model is totally different from some existing network models. Then, synchronization in the proposed network model is analyzed by the stochastic stability theory. A sufficient synchronization condition is given to ensure that the proposed network mod... View full abstract»

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  • An Efficient VLSI Architecture for Nonbinary LDPC Decoders

    Publication Year: 2010 , Page(s): 51 - 55
    Cited by:  Papers (19)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (219 KB) |  | HTML iconHTML  

    Low-density parity-check (LDPC) codes constructed over the Galois field GF(q), which are also called nonbinary LDPC codes, are an extension of binary LDPC codes with significantly better performance. Although various kinds of low-complexity quasi-optimal iterative decoding algorithms have been proposed, the VLSI implementation of nonbinary LDPC decoders has rarely been discussed due to thei... View full abstract»

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  • Stabilizing Technique for AC–DC Boost PFC Converter Based on Time Delay Feedback

    Publication Year: 2010 , Page(s): 56 - 60
    Cited by:  Papers (16)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (575 KB) |  | HTML iconHTML  

    It is well known that the ac-dc power factor correction (PFC) boost preregulator can present instability at the line frequency. This nonlinear phenomenon can jeopardize the system performances by increasing the total harmonic distortion and decreasing the power factor. In this brief, a new stabilizing technique is applied using time delay feedback when the system exhibits slow-scale instability un... View full abstract»

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  • Passivity Test of Immittance Descriptor Systems Based on Generalized Hamiltonian Methods

    Publication Year: 2010 , Page(s): 61 - 65
    Cited by:  Papers (6)
    Save to Project icon | Request Permissions | Click to expandAbstract | PDF file iconPDF (622 KB) |  | HTML iconHTML  

    A generalized Hamiltonian method (GHM) and its half-size variant (HGHM) are proposed to characterize the spectral behaviors of descriptor systems (DSs). With the preprocess improper part test, GHM and HGHM can be applied to test the passivity of immittance (impedance or admittance) DSs without system decomposition, system index assumption, or minimal realization requirement, which are the major bo... View full abstract»

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  • 2010 IEEE international symposium on circuits and systems

    Publication Year: 2010 , Page(s): 66
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    Freely Available from IEEE
  • Why we joined ... [advertisement]

    Publication Year: 2010 , Page(s): 67
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  • IEEE Transactions on Circuits and Systems—II: Express Briefs Information for authors

    Publication Year: 2010 , Page(s): 68
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  • IEEE Circuits and Systems Society Information

    Publication Year: 2010 , Page(s): C3
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  • Blank page [back cover]

    Publication Year: 2010 , Page(s): C4
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Aims & Scope

TCAS II publishes brief papers in the field specified by the theory, analysis, design, and practical implementations of circuits, and the application of circuit techniques to systems and to signal processing. Included is the whole spectrum from basic scientific theory to industrial applications. The field of interest covered includes:

  • Circuits: Analog, Digital and Mixed Signal Circuits and Systems  
  • Nonlinear Circuits and Systems, Integrated Sensors, MEMS and Systems on Chip, Nanoscale Circuits and Systems, Optoelectronic
  • Circuits and Systems, Power Electronics and Systems
  • Software for Analog-and-Logic Circuits and Systems
  • Control aspects of Circuits and Systems. 

Full Aims & Scope