IEEE.org| IEEE Xplore Digital Library| IEEE Standards| IEEE Spectrum| More Sites

Cart (Loading....) | Create Account | Sign In

Author Search^beta | Advanced Search | Preferences | | More Search Options

Browse Journals & Magazines > Circuits and Systems I: Regula ... Volume 56 Issue 11

Circuits and Systems I: Regular Papers, IEEE Transactions on

| Create Account

IEEE Account

Change Username/Password
Update Address

Purchase Details

Payment Options
Order History
Access Purchased Documents

Profile Information

Communications Preferences
Profession and Education
Technical Interests

Need Help?

US & Canada: +1 800 678 4333
Worldwide: +1 732 981 0060
Contact & Support

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2013 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.

Please enter a valid username or password.

For Institutional Users:

More Search Options

Circuits and Systems I: Regular Papers, IEEE Transactions on

Issue 11 • Date Nov. 2009

Society Sponsor

Filter Results

You have selected:

You have selected:

Title History

Table of contents

IEEE Transactions on Circuits and Systems—I: Regular Papers publication information

Analysis and Design of the 0.13- $\mu\hbox {m}$ CMOS Shunt–Series Series–Shunt Dual-Feedback Amplifier

A Pixel-Parallel Self-Similitude Processing for Multiple-Resolution Edge-Filtering Analog Image Sensors

A Spike-Latency Model for Sonar-Based Navigation in Obstacle Fields

Analog Decoder Performance Degradation Due to BJTs' Parasitic Elements

Design and Implementation of Cost-Effective Probabilistic-Based Noise-Tolerant VLSI Circuits

Architecture and FPGA Design of Dichotomous Coordinate Descent Algorithms

A Fast and Power–Area-Efficient Accumulator for Flying-Adder Frequency Synthesizer

A Low-Complexity High-Radix RNS Multiplier

A Flexible and Scalable Structure to Compensate Frequency Response Mismatches in Time-Interleaved ADCs

Linear LMS Compensation for Timing Mismatch in Time-Interleaved ADCs

All Digital-Quadrature-Modulator Based Wideband Wireless Transmitters

A 0.18- $\mu\hbox {m}$ CMOS GFSK Analog Front End Using a Bessel-Based Quadrature Discriminator With On-Chip Automatic Tuning

A 107-pJ/bit 100-kb/s 0.18- $\mu\hbox {m}$ Capacitive-Coupling Transceiver With Data Edge Signaling and DC Power-Free Pulse Detector for Printable Communication Sheet

Design of a Solar-Harvesting Circuit for Batteryless Embedded Systems

IEEE Circuits and Systems Society Information

ISCAS 2010

Aims & Scope

Meet Our Editors

Further Links

IEEE Account

Purchase Details

Profile Information

Need Help?