Computer

Issue 4 • April 1993

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Displaying Results 1 - 10 of 10
  • Development of a multichip module DSP

    Publication Year: 1993, Page(s):13 - 21
    Cited by:  Papers (10)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1154 KB)

    The signal processor packaging design (SPPD) general-purpose digital signal processor (DSP) architecture is discussed. SPPD is a highly modular processor architecture that is based on off-the-shelf components and that supports a multichip module (MCM) design implementation that delivers 400 million floating-point operations per second in a 75-g package. The interconnect-substrate design, MCM packa... View full abstract»

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  • Overlay high-density interconnect: a chips-first multichip module technology

    Publication Year: 1993, Page(s):23 - 29
    Cited by:  Papers (37)  |  Patents (13)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (732 KB)

    A high-density interconnection (HDI) technology that involves placing bare chips into cavities on a base substrate and fabricating the thin-film interconnect structure on top of the components is described. The interconnects to the chip I/O pads are formed as part of the thin-film fabrication process, thus eliminating the need for wire bonds, tape-automated bonds (TABs), or solder bumps. The need ... View full abstract»

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  • Early package analysis: considerations and case study

    Publication Year: 1993, Page(s):30 - 39
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1064 KB)

    Several issues associated with multichip module (MCM) system design are discussed. An early analysis tool for evaluating the tradeoffs between a design and packaging technology is presented. A case study of a possible design point suggested by combining different package elements being used in MCMs settings is included. The case study indicates that the most effective packaging solution for high-p... View full abstract»

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  • A multichip module design process for notebook computers

    Publication Year: 1993, Page(s):41 - 49
    Cited by:  Papers (2)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (849 KB)

    A packaging system design process for multichip modules (MCMs) is presented. The performance factors, cost factors, alternative packaging technologies, and packaging alternatives for daughter cards are discussed. The process is illustrated by applying to the design of a 80386SL chip that contains a 32-b integer central processing unit (CPU), memory management, bus control, and buffering, and a 823... View full abstract»

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  • Hybrid-WSI: a massively parallel computing technology?

    Publication Year: 1993, Page(s):50 - 61
    Cited by:  Papers (24)  |  Patents (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1492 KB)

    It is argued that although it is not yet clear which of the two wafer scale integration (WSI) forms, monolithic or hybrid, will gain the lead to an enabling technology for second-generation massively parallel computers (MPCs), there are noticeably more backers for hybrid-WSI. The application requirements, implementation problems, and engineering issues of MPCs are discussed. In particular, the ass... View full abstract»

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  • An integrated multicomponent synthesis environment for MCMs

    Publication Year: 1993, Page(s):62 - 74
    Cited by:  Papers (10)  |  Patents (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1459 KB)

    The multicompact synthesis (MSS) integrated design environment for multichip modules (MCMs) is discussed. The MSS environment is centered in VHDL (very-high-speed integrated circuit hardware description language), WAVES (waveform and vector exchange specification), and PDL (performance description language). MSS provides four levels of automated synthesis support all the way from the behavioral le... View full abstract»

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  • Design for packageability-early consideration of packaging from a VLSI designer's viewpoint

    Publication Year: 1993, Page(s):76 - 81
    Cited by:  Papers (15)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (780 KB)

    Designing VLSI dies without considering packaging issues may result in a suboptimum system. It is argued that before the design of VLSI dies is completed, packaging issues should be evaluated, since they may affect choices in VLSI circuit design and layout. To illustrate this, the design of an image processing chip-set of three integrated circuits for wire-bond printed circuit board (PCB) and flip... View full abstract»

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  • A road map to ARPA involvement in electronic packaging

    Publication Year: 1993, Page(s):82 - 86
    Cited by:  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (501 KB)

    The application of advanced electronic packaging and interconnect (EP/I) technology by US Department of Defense's Advance Research Projects Agency are discussed. The EP/I domain includes packages, multichip modules (MCMs), connectors, printed circuit boards (PCBs), boxes, backplanes, and cages. The EP/I physical technologies, including diamond substrates, superconductors, and metal matrix packages... View full abstract»

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  • Future impact of solid-state technology on computers

    Publication Year: 1993, Page(s):103 - 104
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (302 KB)

    Several emerging technologies that promise the highest speeds or lowest power of operation or some combination in between are discussed. The three approaches taken to increase the transistor's speed are reviewed. They are to make devices smaller so that electrons (or holes) travel shorter distances in response to a signal, to change from silicon to new high-speed materials, and to use new transist... View full abstract»

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  • New software-quality metrics methodology standard fills measurement need

    Publication Year: 1993, Page(s):105 - 106
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (272 KB)

    The IEEE 1061, IEEE standard for a software-quality metrics methodology, which is the first IEEE-issued standard that deals with quality metrics, is discussed. The philosophy behind the standard, the scope of the standard, and the standard's intended audience are described. Several aspects of the standard, including the methodology of metrics and validity criteria, are reviewed.<> View full abstract»

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Computer, the flagship publication of the IEEE Computer Society, publishes peer-reviewed articles written for and by computer researchers and practitioners representing the full spectrum of computing and information technology, from hardware to software and from emerging research to new applications. 

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Editor-in-Chief
Sumi Helal
Lancaster University
sumi.helal@computer.org