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IEEE Transactions on Computers

Issue 10 • Date Oct. 2009

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Displaying Results 1 - 16 of 16
  • [Front cover]

    Publication Year: 2009, Page(s): c1
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    Freely Available from IEEE
  • [Inside front cover]

    Publication Year: 2009, Page(s): c2
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  • Leveraging Access Locality for the Efficient Use of Multibit Error-Correcting Codes in L2 Cache

    Publication Year: 2009, Page(s):1297 - 1306
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3263 KB) | HTML iconHTML

    It is almost evident that SRAM-based cache memories will be subject to a significant degree of parametric random defects if one wants to leverage the technology scaling to its full extent. Although strong multibit error-correcting codes (ECC) appear to be a natural choice to handle a large number of random defects, investigation of their applications in cache remains largely missing arguably becau... View full abstract»

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  • Store Buffer Design for Multibanked Data Caches

    Publication Year: 2009, Page(s):1307 - 1320
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2946 KB) | HTML iconHTML

    This paper focuses on how to design a store buffer (STB) well suited to first-level multibanked data caches. The goal is to forward data from in-flight stores into dependent loads within the latency of a cache bank. Taking into account the store lifetime in the processor pipeline and the data forwarding behavior, we propose a particular two-level STB design in which forwarding is done speculativel... View full abstract»

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  • Fast CRCs

    Publication Year: 2009, Page(s):1321 - 1331
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1225 KB) | HTML iconHTML Multimedia Media

    CRCs have desirable properties for effective error detection. But their software implementation, which relies on many steps of the polynomial division, is typically slower than other codes such as weaker checksums. A relevant question is whether there are some particular CRCs that have fast implementation. In this paper, we introduce such fast CRCs as well as an effective technique to implement th... View full abstract»

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  • Bit-Serial and Bit-Parallel Montgomery Multiplication and Squaring over GF(2^m)

    Publication Year: 2009, Page(s):1332 - 1345
    Cited by:  Papers (28)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2816 KB) | HTML iconHTML

    Multiplication and squaring are main finite field operations in cryptographic computations and designing efficient multipliers and squarers affect the performance of cryptosystems. In this paper, we consider the Montgomery multiplication in the binary extension fields and study different structures of bit-serial and bit-parallel multipliers. For each of these structures, we study the role of the M... View full abstract»

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  • Power-efficient pipelined reconfigurable fixed-width Baugh-Wooley multipliers

    Publication Year: 2009, Page(s):1346 - 1355
    Cited by:  Papers (16)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (4249 KB) | HTML iconHTML

    In this paper, we propose a pipelined reconfigurable fixed-width Baugh-Wooley multiplier design framework that provides four configuration modes (CMs): n ?? n fixed-width multiplier, two n/2 ?? n/2 fixed-width multipliers, n/2 ?? n/2 full-precision multiplier, and two n/A ?? n/A full-precision multipliers. Furthermore, low-power schemes including gated clock and zero input techniques are employed ... View full abstract»

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  • Exploiting Stream Request Locality to Improve Query Throughput of a Data Integration System

    Publication Year: 2009, Page(s):1356 - 1368
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1385 KB) | HTML iconHTML

    This paper focuses on the problem of improving throughput of distributed query processing in an RDBMS-based data integration system. Although a buffer pool can be used in an RDBMS to cache disk pages in memory to reduce disk accesses, it cannot be used for data integration queries since its foundation, the memory-disk hierarchy, does not exist. The lack of a data sharing mechanism limits system th... View full abstract»

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  • 3D-Integrated SRAM Components for High-Performance Microprocessors

    Publication Year: 2009, Page(s):1369 - 1381
    Cited by:  Papers (30)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3309 KB) | HTML iconHTML

    3D integration is an emergent technology that has the potential to greatly increase device density while simultaneously providing faster on-chip communication. 3D fabrication involves stacking two or more die connected with a very high density and low-latency interface. The die-to-die vias that comprise this interface can be treated as regular on-chip metal due to their small size (on the order of... View full abstract»

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  • Reliability-Aware Energy Management for Periodic Real-Time Tasks

    Publication Year: 2009, Page(s):1382 - 1397
    Cited by:  Papers (43)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1699 KB) | HTML iconHTML

    Dynamic voltage and frequency scaling (DVFS) has been widely used to manage energy in real-time embedded systems. However, it was recently shown that DVFS has direct and adverse effects on system reliability. In this work, we investigate static and dynamic reliability-aware energy management schemes to minimize energy consumption for periodic real-time systems while preserving system reliability. ... View full abstract»

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  • Virtual Configuration Management: A Technique for Partial Runtime Reconfiguration

    Publication Year: 2009, Page(s):1398 - 1410
    Cited by:  Papers (3)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (4885 KB) | HTML iconHTML

    Reconfigurable computers (RCs), built from configurable processors can offer high performance in a wide range of applications. However, due to the limited reconfigurable resources, not all needed functionalities can be implemented at the same time, and runtime reconfiguration becomes an appealing solution. This work proposes techniques suitable for multitasking applications as well as applications... View full abstract»

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  • Analyzing the Galbraith-Lin-Scott Point Multiplication Method for Elliptic Curves over Binary Fields

    Publication Year: 2009, Page(s):1411 - 1420
    Cited by:  Papers (9)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1161 KB) | HTML iconHTML

    Galbraith, Lin, and Scott recently constructed efficiently computable endomorphisms for a large family of elliptic curves defined over IFq2 and showed, in the case where q is a prime, that the Gallant-Lambert-Vanstone point multiplication method for these curves is significantly faster than point multiplication for general elliptic curves over prime fields. In this paper, we investigate... View full abstract»

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  • High-Performance Rekeying Processor Architecture for Group Key Management

    Publication Year: 2009, Page(s):1421 - 1434
    Cited by:  Papers (9)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3775 KB) | HTML iconHTML

    Group key management is a critical task in secure multicast applications such as Pay-TV over the Internet. The communication group key must be updated and distributed after every change in the group membership. Many solutions have been proposed in the last years to minimize the cost of this rekeying process on the server side. Most of these solutions are tree-based approaches such as the logical k... View full abstract»

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  • Correcting the Normalization Shift of Redundant Binary Representations

    Publication Year: 2009, Page(s):1435 - 1439
    Cited by:  Papers (5)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (717 KB) | HTML iconHTML

    An important problem in the realization of floating-point subtraction is the identification of the position of the first nonzero digit in a radix-represented number, since the significand usually is to be represented left-normalized in the part of the word(s) allocated for representing its value. There are well-known log-time algorithms for determining this position for numbers in nonredundant rep... View full abstract»

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  • TC Information for authors

    Publication Year: 2009, Page(s): c3
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    Freely Available from IEEE
  • [Back cover]

    Publication Year: 2009, Page(s): c4
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    Freely Available from IEEE

Aims & Scope

The IEEE Transactions on Computers is a monthly publication with a wide distribution to researchers, developers, technical managers, and educators in the computer field.

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Meet Our Editors

Editor-in-Chief
Paolo Montuschi
Politecnico di Torino
Dipartimento di Automatica e Informatica
Corso Duca degli Abruzzi 24 
10129 Torino - Italy
e-mail: pmo@computer.org