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Electronic Computers, IRE Transactions on

Issue 3 • Date Sept. 1961

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Displaying Results 1 - 25 of 42
  • [Front cover]

    Page(s): c1
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    Freely Available from IEEE
  • IRE Professional Group on Electronic Computers

    Page(s): nil1
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    Freely Available from IEEE
  • [Breaker page]

    Page(s): nil1
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    Freely Available from IEEE
  • Editorial

    Page(s): 345
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    Freely Available from IEEE
  • An Algorithm for Path Connections and Its Applications

    Page(s): 346 - 365
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    The algorithm described in this paper is the outcome of an endeavor to answer the following question: Is it possible to find procedures which would enable a computer to solve efficiently path-connection problems inherent in logical drawing, wiring diagramming, and optimal route finding? The results are highly encouraging. Within our framework, we are able to solve the following types of problems: 1) To find a path between two points so that it crosses the least number of existing paths. 2) To find a path between two points so that it avoids as much as possible preset obstacles such as edges. 3) To find a path between two points so that the path is optimal with respect to several properties; for example, a path which is not only one of those which cross the fewest number of existing paths, but, among these, is also one of the shortest. The minimal-distance solution has been programmed on an IBM 704 computer, and a number of illustrations are presented. The class of problems solvable by our algorithm is given in a theorem in Section III. A byproduct of this algorithm is a somewhat remote, but unexpected, relation to physical optics. This is discussed in Section VI. View full abstract»

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  • Cascaded Finite-State Machines

    Page(s): 366 - 370
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    In this paper, networks of finite-state machines, rather than individual machines, are discussed. The investigation centers around cascade networks, where the output of one machine serves as an input to another. It is shown how, by means of connection matrices, the characteristics of such a network can be obtained from those of the component machines, and how a specified machine can be decomposed into a number of cascaded components. The advantages of such a decomposition, as well as some of the problems that remain to be solved in this area, are discussed. View full abstract»

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  • The Realization of Symmetric Switching Functions with Linear-Input Logical Elements

    Page(s): 371 - 378
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    The problem of synthesizing switching networks out of linear-input (threshold) elements is studied for the class of symmetric switching functions. Tight bounds are derived for the number of elements required in a minimal realization, and a method of synthesis is presented which yields economical networks. Minimal networks result for all symmetric functions of no more than about twelve variables, and for several other cases. In particular, it is shown how the parity function of any number n of variables can be realized with about log2(n) elements. View full abstract»

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  • Orthogonal Functions for the Logical Design of Switching Circuits

    Page(s): 379 - 383
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    A new approach to the mathematical representation of switching functions is presented. It was developed in connection with a theoretical study of magnetic-core logic, but the results are considered to be more basic and general than the core-logic problem. The ampere-turns (MMF) expression for core switching is shown to be part of a special type of Fourier series expansion of a switching function, in which the turns are directly related to the spectrum of the function. Fouriers transform methods, used for analysis of X-ray diffraction, have been adapted to the representation of switching functions. The method leads not to Boolean algebra, but to ordinary algebra in terms of the orthogonal functions (¿1)k1z1+k2z2+...+knzn, where X1, X2,...,Xn = 0,1, and k1,k2,...,kn = 0,1. Methods of application are described for magnetic-core logic and for character recognition. View full abstract»

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  • Autocorrelations for Boolean Functions of Noiselike Periodic Sequences

    Page(s): 383 - 388
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    One method of generating a waveform whose correlation function resembles that of noise is by means of combinations of periodic binary sequences. In this paper the properties of the correlation function for arbitrary functions of n periodic binary sequences are investigated. An especially simple formulation is obtained when each binary variable in all the sequences has equal probability of being 0 or 1. For this case, it is shown that there are only two functions which result in a correlation function like true purely random noise. One of these two functions corresponds to addition modulo 2. Also, the correlation for the case of a random function of n sequences is derived. Finally, expressions are obtained for the number of degenerate Boolean functions. View full abstract»

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  • Signed-Digit Numbe Representations for Fast Parallel Arithmetic

    Page(s): 389 - 400
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    This paper describes a class of number representations which are called signed-digit representations. Signed-digit representations limit carry-propagation to one position to the left during the operations of addition and subtraction in digital computers. Carry-propagation chains are eliminated by the use of redundant representations for the operands. Redundancy in the number representation allows a method of fast addition and subtraction in which each sum (or difference) digit is the function only of the digits in two adjacent digital positions of the operands. The addition time for signed-digit numbers of any length is equal to the addition time for two digits. The paper discusses the properties of signed-digit representations and arithmetic operations with signed-digit numbers: addition, subtraction, multiplication, division and roundoff. A brief discussion of logical design problems for a signed-digit adder concludes the presentation. View full abstract»

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  • Computing Machine Aids to a Development Project

    Page(s): 400 - 406
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    A system o integrated computer programs which provide useful machine assistance to the development of a digital system will be described. The individual programs are capable of such separate engineering tasks as verifying design data, optimally locating electronic logic packages on a chassis, routing interconnecting wires and preparing documents like wiring diagrams and wire running lists. The engineer using the system need not be a computer programmer, because the machine aids programs are called into operation with a simple mnemonic language keyed to the engineer's traditional tasks. This aspect of the work, as well as the accomplishment of the individual engineering tasks, is emphasized in this paper. View full abstract»

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  • Improvement of Electronic-Computer Reliability through the Use of Redundancy

    Page(s): 407 - 416
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    Physical elements used for switching logic have finite probability of failure. The application of redundancy to logic circuits is presented for improving computer reliability. This paper shows various redundant configurations considered and the conclusionon drawn. From all of the considerations, the majority gate provides a practical method for increasing the reliability. It shows that for operating periods which are short compared to the mean time to failure of the elements, a substantial increase in system reliability is obtained with majority-gate redundancy. View full abstract»

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  • Some Thoughts on Digital Components and Circuit Techniques

    Page(s): 416 - 425
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    Signal standardization and control directivity are emphasized as the basic physical requirements in considering components and circuit techniques for the handling of digital information. The significance and the ways and means of meeting these requirements are most revealing when illustrated by the operations of the parametric phase-locked oscillator and the tunnel diode. A categorical listing of digital-gain elements, accompanied by illustrative comments, is presented to offer a unified viewpoint on digital components and circuit techniques in connection with present-day practice and prospective future development. View full abstract»

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  • UNIYAC-LARC High-Speed Circuitry: Case History in Circuit Optimization

    Page(s): 426 - 438
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    In recent years, the design of computer circuits has become a thorough and complex job. Factors such as logical design, behavior of components, manufacturing techniques, and life tests are playing an even more important role in the design of an efficient circuit. This paper will discuss how circuit optimization techniques and use of the UNIVAC® I computing system aided in reducing cost and avoiding many of the pitfalls in the design and production of efficient high-speed circuitry for UNIVAC-LARC. View full abstract»

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  • Coincident-Current Superconductive Memory

    Page(s): 438 - 446
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    In a continuous superconductive film memory, elements are obtained through discrete regions of circulation of persistent currents near the intersection of x-y conductors deposited on the film. Analysis and confirming experiments show that these regions are stable. The elimination of edges of discrete film dots removes the main cause of variation of critical currents. Reproducibilities better than one quarter per cent were obtained. Simplicity of construction permits high bit densities. Memory planes of one hundred cells were made. Advisable speed of operation depends mainly on addressing and sensing circuits. Write-in in 3 nsec was obtained in single elements with only 60 milliamperes drive. View full abstract»

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  • Semipermanent Storage by Capacitive Coupling

    Page(s): 446 - 451
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    The need arises for reliable, economical high-speed, semipermanent stores for electronic-telephone switching systems, as well as for modern digital computers. A semipermanent or fixed store is one in which the stored information may not be changed by the machine that is able to consult it. These stores provide data security for such information as operational programs and test routines. A random-access store system where the memory elements consist of a matrix of printed capacitors has been developed. The store has a cycle time of 3 Asec and contains 1024 words each 34 bits long. The access circuits developed enable one to utilize a matrix arrangement of components where a need exists for stores of thousands of words. These circuits consist of diodes and biased square-loop ferrite cores in the input, and magnetic gates, utilizing three transformers in a novel arrangement, in the output. View full abstract»

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  • A Card-Changeable Permanent-Magnet-Twistor Memory of Large Capacityt

    Page(s): 451 - 461
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    The card-changeable permanent-magnet-twistor memory is a large capacity (ca 105 bits) storage media for information that is infrequently changed. The information is stored in the form of small bar magnets bonded to a removable plastic card. The magnets, when magnetized, inhibit the switching of a section of twistor wire at a twistor-wire-solenoid crosspoint. For maximum information density the magnet shape and strength must be optimized with respect to the magnet's action on the inhibited crosspoint and the fringing action on neighboring crosspoints. The objective is a magnet with a small dipole moment, but with adequate inhibition of the twistor switching over a reasonable range of misposition. Suitable magnet shapes and a general discussion of the stray fields in a large array of magnets are given. For maximum capacity, the transmission characteristics of the twistor wire and the character of the access switch must be considered. Two novel structures of this memory permit increased information density and capacity. The feasibility of a random-access high-density memory submodule containing 360,000 bits in 0.7 foot3 with a cycle time of 5 ¿sec has been demonstrated. View full abstract»

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  • Correction

    Page(s): 461
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  • A Note on the System Requirements of a Digital Computer for the Manipulation of List Structures

    Page(s): 484 - 489
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    The technique of programming within the framework of the so-called Newell-Shaw-Simon (NSS) associative list memory is currently the subject of much interest among workers in the area of advanced programming research. Unfortunately, committing a given program to list memory generally entails accepting a significant loss of speed and efficiency in information processing, so that the advantages accruing from the use of list memory must be carefully balanced against its weaknesses. This paper is concermed with the system requirements of a digital computer for which the use of list techniques is to be competitive with standard programming, so that the particular memory organization for a given problem may be chosen on the basis of suitability and ease of programming alone. A description of a list-processing 7090-type computer is appended in order to make our discussion concrete, although engineering and economic feasibility is not implied. View full abstract»

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  • The Simulation of Three Machines Which Read Rows of Handwritten Arabic Numbers

    Page(s): 489 - 501
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    Three machines have been simulated using an optical scanner and the IBM 704 computer. Each of these simulated machines has read documents containing rows of handwritten Arabic numbers. Sample numbers were produced by at least 20 people for each simulation study. The three machines simulated differ in the control required of the writer during document preparation and in the complexity of the machines. Writing controls were required for the preparation of the first two types of documents. A section of this paper concerns experiments with and a mathematical model of controlled writing. The third simulated machine was applied both to numbers written within preprinted boxes and to numbers written without any guide marks. About one per cent of 2180 of these numbers were misread as the wrong character. This error rate is based on a sequential experiment in which the recognition logic is constructed from all characters not recognized and thus rejected prior to each input character. Numbers, when rejected, cause the programn to identify them from a table. Their structure is then entered into the recognition logic. The rejection rate decreased throughout the experiment. The last rejection rate was about 10 per cent. View full abstract»

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  • An Analog Method for Character Recognition

    Page(s): 502 - 512
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    A method for character recognition which is capable of an analog implementation has been studied by simulation on asymbols digital computer. In essence, this method involves maximizing the cross-correlation value between the unknown character and a set of average characters, there being one average character for each allowed character class. An average character is represented by a two-dimensional function. The value of this function at a point is the probability of occurrence of a mark at that point for the character class represented by the average character. Negative weights are given to areas of low probability in each average character to improve discriminability. The simulation results indicate that this method is applicable to the recognition of machine printing, and perhaps to the recognition of constrained hand printing. The method can be implemented in an economical manner using electro-optical techniques. View full abstract»

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  • The Hall-Effect Analog Multiplier

    Page(s): 512 - 515
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    The application of the Hall effect to a general-purpose four-quadrant multiplier is discussed. Circuit diagrams for the transistor amplifiers are given. An evaluation of the experimental results is given for a breadboard model of the multiplier. Static accuracies on the order of 1 per cent to 3 per cent are obtained for the Hall channel and the magnetic channel, respectively. Bandwidths of 25 kc and 1.3 kc are achieved for the Hall channel and the magnetic channel, respectively. View full abstract»

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  • Copper-Mandrel Potentiometer Dynamic Error and Compensation

    Page(s): 516 - 523
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    A simple potentiometer equivalent circuit is presented that is valid for single or multiturn, copper-mandrel, wire-wound precision potentiometers. Developed to obtain a practical approximation of potentiometer ac characteristics, it is particularly useful in error analyses where small phase errors are critical. Capacitive compensation techniques are also given that can achieve considerable reduction in potentiometer dynamic error. Even for heavy capacitive loading it is possible virtually to eliminate potentiometer phase error (important in most analog computer circuits). Correspondingly, high-frequency square waves can be attenuated reasonably by such capacitively-compensated potentiometers. View full abstract»

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  • Design of the ESIAC® Algebraic Computer

    Page(s): 524 - 529
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    The concept of a pair of potential-plane ``factor analogs,'' in which voltage measurements at the zeros and poles of a function are used for the calculation, is employed in the design of a general-purpose computer for algebraic functions of a complex variable. The logarithmic complex plane is used in order to represent a wide range of zeros and poles with uniform accuracy. Plotting facilities provide direct graphical output for applications such as frequency response plots and root-locus plots. View full abstract»

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Aims & Scope

This Transactions ceased publication in 1962. The current retitled publication is 

IEEE Transactions on Computers.

Full Aims & Scope