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Power Electronics, IEEE Transactions on

Issue 9 • Date Sept. 2009

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Displaying Results 1 - 23 of 23
  • [Front cover]

    Publication Year: 2009 , Page(s): C1
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  • IEEE Transactions on Power Electronics publication information

    Publication Year: 2009 , Page(s): C2
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  • Table of contents

    Publication Year: 2009 , Page(s): 2045 - 2046
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  • Passivity-Based Control for an Interleaved Current-Fed Full-Bridge Converter With a Wide Operating Range Using the Brayton–Moser Form

    Publication Year: 2009 , Page(s): 2047 - 2056
    Cited by:  Papers (9)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (427 KB) |  | HTML iconHTML  

    An interleaved current-fed full-bridge converter has the capability to step up the voltage while maintaining a low input current ripple. Therefore, it is suitable for application such as a front-end converter for fuel cell where the source current ripple has to be small. However, since the source voltage varies with change in load profile, it is a challenge to design a stable controller that works well for a wide operating range. In this paper, an energy-based approach using a Brayton-Moser modeled passivity-based controller is proposed along with an augmented integrator to achieve voltage regulation under wide operating range. Experimental results verify that the proposed controller is able to achieve good dynamic performance and stable operation under wide operating range. View full abstract»

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  • Diode-Assisted Buck–Boost Voltage-Source Inverters

    Publication Year: 2009 , Page(s): 2057 - 2064
    Cited by:  Papers (24)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (997 KB) |  | HTML iconHTML  

    This paper proposes a number of diode-assisted buck-boost voltage-source inverters with a unique X-shaped diode-capacitor network inserted between the inverter circuitry and dc source for producing a voltage gain that is comparatively higher than those of other buck-boost conversion techniques. Using the diode-assisted network, the proposed inverters can naturally configure themselves to perform capacitive charging in parallel and discharging in series to give a higher voltage multiplication factor without compromising waveform quality. In addition, by adopting different front-end circuitries, a number of diode-assisted inverter variants can be designed with each having its own operational principle and voltage gain expression. For controlling them, a generic modulation scheme that can be used for controlling all diode-assisted variants with minimized harmonic distortion and component stress is first designed, before proceeding on to design a second scheme with minimized commutation count for complement. All theoretical findings discussed in the paper were verified experimentally using a number of scale-down laboratory prototypes with relevant results presented in a later section for visual confirmation. View full abstract»

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  • A Recursive Park Transformation to Improve the Performance of Synchronous Reference Frame Controllers in Shunt Active Power Filters

    Publication Year: 2009 , Page(s): 2065 - 2075
    Cited by:  Papers (11)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (669 KB) |  | HTML iconHTML  

    Load harmonic currents and load unbalances reduce power quality (PQ) supplied by electrical networks. Shunt active power filters (SAPFs) are a well-known solution that can be employed to enhance electrical PQ by injecting a compensation current at the point of common coupling (PCC) of the SAPF, the load, and the electrical grid. Hence, SAPF controllers must determine the instantaneous values of the compensation reference current, including nondesirable components of the load current. A family of SAPF controllers, which evaluates the compensation reference current using synchronous rotating frames (SRFs), employs a structure based on Park transformations: direct transform, low- pass filtering (LPF), and inverse transform. The cutoff frequency and the filter order of the LPF stage must be designed properly in order to obtain an accurate reference current and a fast dynamic response of these SAPF controllers. This paper proposes a recursive implementation of the direct Park transformation that avoids the filtering stage and allows accurate SRF controllers to be designed. Moreover, the proposed implementation is not dependent on PCC conditions. The proposed implementation is evaluated using a three-phase, three-wire SAPF and compared with LPF-based controllers by simulation and experiment. View full abstract»

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  • Optimization and Evaluation of Torque-Sharing Functions for Torque Ripple Minimization in Switched Reluctance Motor Drives

    Publication Year: 2009 , Page(s): 2076 - 2090
    Cited by:  Papers (31)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (674 KB) |  | HTML iconHTML  

    Two improved torque-sharing functions for implementing torque ripple minimization (TRM) control are presented in this paper. The proposed torque-sharing functions are dependent on the turn-on angle, overlap angle, and the expected torque. This study shows that for a given torque the turn-on angle and the overlap angle have significant effects upon speed range, maximum speed, copper loss, and efficiency. Hence, genetic algorithm is used to optimize the turn-on angle and the overlap angle at various expected torque demands operating under the proposed TRM control in order to maximize the speed range and minimize the copper loss. Furthermore, four torque-sharing functions are used to derive the optimized results. At the same time, a fast and accurate online approach to compute the optimal turn-on and overlap angles is proposed. Therefore, this paper provides a valuable method to improve the performances of switched reluctance motor drives operating under TRM control. View full abstract»

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  • A Dynamic Hybrid Var Compensator and a Two-Level Collaborative Optimization Compensation Method

    Publication Year: 2009 , Page(s): 2091 - 2100
    Cited by:  Papers (3)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (899 KB) |  | HTML iconHTML  

    In this paper, a dynamic hybrid var compensator (HVC) for distribution grid is proposed. The system is based on a combination of a small-capacity distribution static compensator (DSTATCOM) and multigroup large-capacity thyristor switched capacitor (TSC). The DSTATCOM is the continuous subsystem of HVC, and the TSCs are the discrete subsystem of HVC. A new hybrid control method based on expert decision has been proposed to make sure that the HVC has good performance. A two-level collaborative optimization arithmetic, which is used to decide the optimal capacity of each HVC, has been proposed in this paper. A dynamic energy-saving system based on HVCs has been developed for a melt factory in southern China; application results show that compared to traditional reactive power compensation systems, the proposed system can effectively correct power factor, support supply voltage, mitigate voltage flicker, and obtain good effect for energy saving with low cost. View full abstract»

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  • A Physically Based Fluorescent Lamp Model for a SPICE or a Simulink Environment

    Publication Year: 2009 , Page(s): 2101 - 2110
    Cited by:  Papers (5)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (965 KB) |  | HTML iconHTML  

    This paper describes a method of modeling fluorescent lamps. The lamp model can be implemented in all major circuit simulation software packages, an example has been given for SPICE and Simulink. The model is based upon a simplified set of physical equations that gives the model validity over a wider range of operating conditions than current fluorescent lamp SPICE models allow for. The model can be used to model any low-pressure mercury-buffer gas fluorescent lamps by entering key lamp parameters, length, radius, cold-spot temperature, and buffer gas fill pressure. If fill pressure is not known, a default value dependent on lamp radius is used. The model shows good agreement over a wide range of operating frequencies and lamp powers. View full abstract»

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  • Evaluating Voltage Notch Problems Arising from AC/DC Converter Operation

    Publication Year: 2009 , Page(s): 2111 - 2119
    Cited by:  Papers (6)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (942 KB) |  | HTML iconHTML  

    This paper analyzes the voltage notches in ac/dc converters and the problems that they create. Voltage notch disturbs the voltage's waveform and excites the natural frequencies of the system. In some systems, these excisions create considerable high-frequency oscillations in the voltages of the converter and the adjacent buses; this can damage capacitor banks, create parallel resonance, and generate radio disturbances. This paper analyzes the effect of snubber circuits on the voltage oscillations that arise from commutation. It also presents the theoretical foundation and analytical derivation that are used to calculate notch depth and the frequency of oscillations. To achieve accurate and applicable results, various loads of the converter, the dc current ripple, and the characteristic impedance of the system are considered. Several experimental results are shown in order to illustrate the effects of changes in the system and converter parameters on the voltage waveform of the converter. Computer simulations and experimental results indicate the accuracy of the theoretical relations. The proposed equations make it possible to effectively study the harmonic and power quality in networks that include high-power converters. View full abstract»

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  • Zero-Voltage-Switching Control for a PWM Buck Converter Under DCM/CCM Boundary

    Publication Year: 2009 , Page(s): 2120 - 2126
    Cited by:  Papers (11)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (619 KB) |  | HTML iconHTML  

    A new zero-voltage-switching (ZVS) control approach is presented for pulsewidth modulation (PWM) buck converters under discontinuous conduction mode (DCM)/continuous conduction mode (CCM) boundary. This proposed technique compensates for control circuit delay, and hence, turns on power MOS at the instant exactly when drain-to-source voltage becomes zero. No complicated timing calculation circuits or additional external components are required. This proposed integrated ZVS control can be applied to other dc-dc converters as well. The corresponding circuit analysis, implementation, and die photograph are presented in this paper. Simulation and experimental results for an example circuit with V IN of 5 V and V OUT of 3.3 V reveal that buck converters with the presented ZVS technique have higher efficiency than conventional ones, especially at higher frequencies. At about 3.6 MHz operation, the measured conversion efficiency of the PWM buck converter under DCM/CCM boundary mode with the proposed ZVS approach is 11% higher. View full abstract»

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  • A Input-Series- and Output-Parallel-Connected Inverter System for High-Input-Voltage Applications

    Publication Year: 2009 , Page(s): 2127 - 2137
    Cited by:  Papers (24)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1260 KB) |  | HTML iconHTML  

    This paper presents the configuration and control strategy for input-series- and output-parallel- (ISOP) connected inverter system, which is constructed by connecting multiple inverters in series at input sides and parallel at output sides, such that the inverters share the input voltage and load current equally. The proposed configuration is suitable for high-input-voltage applications. In order to ensure the proper operation of ISOP inverter system, equal sharing of input voltage and sharing of output current among the constituent inverters must be ensured. The relationship between input voltage sharing (IVS) and output current sharing (OCS) is analyzed in this paper. In order to realize equilibrium among the constituent inverters, a three-loop control strategy, consisting of a common output voltage loop, IVS loops, and individual inner current loops, is proposed. The common output voltage loop regulates the inverter system at desired output voltage and provides the basic reference for inner current loops, which is adjusted by the IVS loops to achieve IVS. Both the output current and the output filter inductor current of the individual inverter can be chosen as the feedback signal for the inner current loop and the difference is compared. A 2-kVA two-module ISOP inverter system prototype is fabricated and tested in the laboratory and the experimental results verify the proposed control strategy. View full abstract»

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  • Analysis and Verification of Two-Level Random Aperiodic PWM Schemes for DC–DC Converters

    Publication Year: 2009 , Page(s): 2138 - 2147
    Cited by:  Papers (4)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (758 KB) |  | HTML iconHTML  

    A typical two-level pulsewidth modulation scheme for a dc-dc converter generates a signal that has two values: 0 and 1. For a random aperiodic scheme, the switching period can be modulated in a random fashion with a known probability density function (pdf). In this paper, analytical expressions for both discrete and continuous spectra are provided for the case where different pdfs are used to modulate the switching signal of a dc-dc converter. Experimental results for a random aperiodic scheme that is used to optimize the output ripple of a buck dc-dc converter are provided to support the theoretical claims. View full abstract»

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  • Design and Analysis of User-Defined Constant Switching Frequency Current-Control-Based Four-Leg DSTATCOM

    Publication Year: 2009 , Page(s): 2148 - 2158
    Cited by:  Papers (17)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1078 KB) |  | HTML iconHTML  

    This paper presents a detailed study on the design and analysis of user-defined constant switching (UDCS) frequency current-control-based four-leg distribution static compensator (DSTATCOM). The three phase legs of its voltage source inverter are operated in hysteresis current tracking mode whereas the fourth leg is controlled by a square switching pulse of user-defined frequency. Consequently, the switches of the other three legs also get tuned to this user-defined frequency. Analytical expressions are derived that prescribe the range of frequencies for which the scheme works effectively. Design procedure is also suggested for the selection of the parameters of the four-leg inverter such as dc-link voltage, dc-link capacitor, interface inductor, and hysteresis band. Simulation and experimental studies are conducted to validate the proposed design procedure for a UDCS-controller-based DSTATCOM. Its performance is compared with a conventional hysteresis-controlled DSTATCOM. View full abstract»

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  • Parallel Connection of Integrated Gate Commutated Thyristors (IGCTs) and Diodes

    Publication Year: 2009 , Page(s): 2159 - 2170
    Cited by:  Papers (14)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1449 KB) |  | HTML iconHTML  

    This paper describes the parallel connection of 4.5 kV integrated gate commutated thyristors (IGCTs) and diodes. The impact of varying device characteristics on the stationary current distribution of parallel connected semiconductors is investigated. Possible solutions to improve the current sharing at steady state are presented. A thermal stabilization effect of parallel connected IGCTs is discussed. Furthermore, the behavior of parallel connected devices during switching transients is investigated experimentally in a 1.5-kV, 5-kA buck converter. Especially, the impact of asymmetrical circuit layouts, magnetic couplings, different turn-on and turn-off delays, and junction temperatures are considered. It is shown that a substantial current derating is necessary to enable a reliable operation of parallel IGCTs and diodes. View full abstract»

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  • Modeling for a Multitap Interphase Reactor in a Multipulse Diode Bridge Rectifier

    Publication Year: 2009 , Page(s): 2171 - 2177
    Cited by:  Papers (6)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (631 KB) |  | HTML iconHTML  

    This paper presents a new mathematical model for tapped interphase reactor (IPR) in a six-phase diode bridge rectifier. On the basis of coupling circuit principle and phase coordinate method, the proposed model, which reduces the mutual inductance coupling completely, describes the IPR by an admittance matrix containing the information about the connection way and electrical quantities. To double-tap IPR as an example, and using the proposed method, the full-decoupling model is set up. Compared with the model built by Kirchhoff's law, the proposed model is easier to realize in simulation software. The proposed method can well be extended to the multitap IPR. Some theoretical analysis, computer simulation, and experiments are included to verify the correctness of the model. View full abstract»

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  • DC-link Voltage Control of a Full Power Converter for Wind Generator Operating in Weak-Grid Systems

    Publication Year: 2009 , Page(s): 2178 - 2192
    Cited by:  Papers (33)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (904 KB) |  | HTML iconHTML  

    When the wind power accounts for a large portion of the grid power, it may need to help the grid voltage and frequency regulation. This paper investigates a permanent-magnet wind generator with a full power voltage-source converter in weak-grid mode, where the DC-link voltage needs to be controlled from the generator side instead of the grid side. The energy relationship of the wind generator, DC-link energy storage, and load is established. An intrinsic right-half-plane zero, together with the wind power characteristics, the mechanical system inertia, and the DC-link energy storage, is identified as the physical limitations for the control. With the understanding of the system energy relationship and limitations, a hybrid adaptive control algorithm is proposed that searches for the optimal generator acceleration to achieve the maximum wind generator power change rate to match the load power variation. The proposed control scheme is verified through simulation of a 1.5-MW wind system as well as through the experiment of a scaled 1-kW, DSP-/field-programmable-gate-array-controlled, permanent-magnet-generator-based test bed. The results show that it is feasible to regulate DC link by the generator-side converter through the generator speed control. Some important applications issues are also investigated, including the DC-link energy storage requirement, wind speed change impact, and control transition between the weak-grid and strong-grid modes. View full abstract»

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  • Fixed-Frequency Boundary Control of Buck Converter With Second-Order Switching Surface

    Publication Year: 2009 , Page(s): 2193 - 2201
    Cited by:  Papers (24)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1060 KB) |  | HTML iconHTML  

    This paper presents a fixed-frequency boundary control of buck converters. The method is based on integrating the concept of variable hysteresis into the boundary control technique with second-order switching surface. The switching frequency is maintained constant over a wide range of supply voltages and output loads. The method is based on using a frequency-to-voltage converter and comparing its output voltage with a reference voltage to control the width of the hysteresis in the boundary controller. It also combines the advantages of the boundary control that the converter can reach the steady state in two switching actions after large-signal disturbances. The basic operating principles, stability analysis, and design procedures will be given. The proposed control method has been successfully applied to control a 140 W, 24 V/12 V buck converter. The steady-state characteristics, including the switching frequency and output voltage ripple, at different input voltages and output loads with and without the proposed control method have been compared. The system responses under large-signal supply voltage and load disturbances will be discussed. View full abstract»

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  • Evaluation of Three-Phase Transformerless Photovoltaic Inverter Topologies

    Publication Year: 2009 , Page(s): 2202 - 2211
    Cited by:  Papers (98)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1215 KB) |  | HTML iconHTML  

    This paper analyzes and compares three transformerless photovoltaic inverter topologies for three-phase grid connection with the main focus on the safety issues that result from the lack of galvanic isolation. A common-mode model, valid at frequencies lower than 50 kHz, is adopted to study the leakage current paths. The model is validated by both simulation and experimental results. These will be used to compare the selected topologies, and to explain the influence of system unbalance and the neutral conductor inductance on the leakage current. It will be demonstrated that the later has a crucial influence. Finally, a comparison of the selected topologies is carried out, based on the adopted modulation, connection of the neutral and its inductance, effects of unbalance conditions, component ratings, output voltage levels, and filter size. View full abstract»

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  • Analysis of Microinductor Performance in a 20-100 MHz DC/DC Converter

    Publication Year: 2009 , Page(s): 2212 - 2218
    Cited by:  Papers (12)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (734 KB) |  | HTML iconHTML  

    This paper presents a low-profile thin-film microfabricated inductor on silicon and its performance in a high-frequency low-power DC/DC converter. The design of the inductors has focused on maximizing efficiency while maintaining a relatively flat frequency response up to 30 MHz. The inductance at 20 MHz is approximately 150 nH with a resistance of 1.8 ??. The performance of the microinductor has been compared to two conventional commercially available 150-nH chip inductors. One of the chip inductors has a magnetic-material core and the other is an air core. The maximum efficiency of the microinductor, which relates the power loss of the microinductor to output power loss of the converter, is measured to be approximately 93% at 20 MHz. The low-power DC/DC converter operates in the tens of milliwatts output power range, with an input voltage of 1.8 V and an output voltage programmable between 0 and 1.8 V. The converter maximum efficiency when using the microinductor on silicon is 78.5% at 20 MHz, which is approximately 2% lower than the efficiency using the conventional chip inductors. View full abstract»

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  • Design of a Hybrid Controller ASIC for a VRM Using a 90-nm CMOS Process

    Publication Year: 2009 , Page(s): 2219 - 2230
    Cited by:  Papers (4)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1861 KB) |  | HTML iconHTML  

    This paper proposes an application-specified integrated circuit implementation of the nonlinear controller in voltage regulator modules for high-end microprocessors first proposed by Mazumder and demonstrated on discrete level by Mazumder and Kamisetty. The design scheme is presented where the driver is separated from the controller to enable its integration with the MOSFET using the Driver-MOSFET concept proposed by Intel (DrMOS Technical Specifications, Revision 1.0, Nov. 2004). The controller, which is designed using the ST's 90-nm CMOS process, has increased speed and size performance and can be integrated into the I/O hub or Southbridge component PC chipsets, which are similarly fabricated on submicrometer processes. The transconductance of the process is, however, low giving rise to accuracy problems. We validated the design in simulations by comparing system and transistor-level implementation in Saber and Cadence, respectively. The nonlinear control scheme coupled with adaptive voltage positioning (AVP) enables high-speed response to load transients at relatively constant output impedance. The design is realized in layout with Calibre's verification tool running ST's design rule check runset and is layout versus schematic clean. View full abstract»

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  • IEEE Transactions on Power Electronics Information for authors

    Publication Year: 2009 , Page(s): 2231 - 2232
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    Freely Available from IEEE
  • IEEE Power Electronics Society Information

    Publication Year: 2009 , Page(s): C3
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    Freely Available from IEEE

Aims & Scope

IEEE Transactions on Power Electronics covers fundamental technologies used in the control and conversion of electric power.

Full Aims & Scope