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2009 ICSE Workshop on Multicore Software Engineering

18-18 May 2009

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  • [USB label]

    Publication Year: 2009, Page(s): i
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  • Welcome

    Publication Year: 2009, Page(s): ii
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  • Hub page

    Publication Year: 2009, Page(s): iii
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  • Session list

    Publication Year: 2009, Page(s): iv
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  • Table of contents

    Publication Year: 2009, Page(s):v - vi
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  • Brief author index

    Publication Year: 2009, Page(s):vii - viii
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  • Detailed author index

    Publication Year: 2009, Page(s):ix - xiv
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  • The end of indexes

    Publication Year: 2009, Page(s): xv
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  • [PDF Reader FAQ and support]

    Publication Year: 2009, Page(s): xvi
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  • [PDF Reader FAQ and support]

    Publication Year: 2009, Page(s):xvii - xx
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  • [PDF Reader FAQ and support]

    Publication Year: 2009, Page(s): xxi
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  • [Title page]

    Publication Year: 2009, Page(s): xxii
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  • Foreword

    Publication Year: 2009, Page(s): xxiii
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  • Organizing Committee

    Publication Year: 2009, Page(s): xxiv
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  • Developing parallel programs: A design-oriented perspective

    Publication Year: 2009, Page(s):1 - 8
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (165 KB) | HTML iconHTML

    The behavioral correctness of parallel programs has a pivotal role in computational sciences and engineering applications as researchers draw scientific conclusions from the results generated by parallel applications. Moreover, with the advent of multicore processors, the development of parallel programs should be facilitated for the mainstream developers. While numerous programming models and API... View full abstract»

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  • Model-driven development of multi-core embedded software

    Publication Year: 2009, Page(s):9 - 16
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (250 KB) | HTML iconHTML

    Model-driven development is worthy of further research because of its proven capabilities in increasing productivity and ensuring correctness. However, it has not yet been explored for multi-core processor-based embedded systems, whose programming is even more complex and difficult that that for conventional uni-processor systems. We propose a new VERTAF/Multi-Core (VMC) framework to bridge this g... View full abstract»

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  • Reducing search space of auto-tuners using parallel patterns

    Publication Year: 2009, Page(s):17 - 24
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (288 KB) | HTML iconHTML

    Auto-tuning is indispensable to achieve best performance of parallel applications, as manual tuning is extremely labor intensive and error-prone. Search-based auto-tuners offer a systematic way to find performance optimums, and existing approaches provide promising results. However, they suffer from large search spaces. In this paper we propose the idea to reduce the search space using parameteriz... View full abstract»

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  • Stage: Python with Actors

    Publication Year: 2009, Page(s):25 - 32
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (562 KB) | HTML iconHTML

    Programmers hoping to exploit multi-core processors must split their applications into threads suitable for independent, concurrent execution. The lock-based concurrency of many existing languages is clumsy and error prone - a barrier to writing fast and correct concurrent code. The Actor model exudes concurrency - each entity in the model (an Actor) executes concurrently. Interaction is restricte... View full abstract»

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  • Combining digital access and parallel partition for quicksort and quickselect

    Publication Year: 2009, Page(s):33 - 40
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (274 KB) | HTML iconHTML

    In this paper, we combine digital access to strings with parallel partition to enhance parallel quicksort and quickselect implementations. Previously, digital access had only been combined with sequential comparison-based algorithms and data structures. We present broadly our approach, not only algorithmically but from the design and implementation point of view. Finally, we give some experimental... View full abstract»

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  • COMPASS: A Community-driven Parallelization Advisor for Sequential Software

    Publication Year: 2009, Page(s):41 - 48
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (143 KB) | HTML iconHTML

    The widespread adoption of multicores has renewed the emphasis on the use of parallelism to improve performance. The present and growing diversity in hardware architectures and software environments, however, continues to pose difficulties in the effective use of parallelism thus delaying a quick and smooth transition to the concurrency era. In this paper, we describe the research being conducted ... View full abstract»

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  • Profiling Java programs for parallelism

    Publication Year: 2009, Page(s):49 - 55
    Cited by:  Papers (12)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (396 KB) | HTML iconHTML

    One of the biggest challenges imposed by multi-core architectures is how to exploit their potential for legacy systems not built with multiple cores in mind. By analyzing dynamic data dependences of a program run, one can identify independent computation paths that could have been handled by individual cores. Our prototype computes dynamic dependences for Java programs and recommends locations to ... View full abstract»

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  • SPARTAN: A software tool for Parallelization Bottleneck Analysis

    Publication Year: 2009, Page(s):56 - 63
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (185 KB) | HTML iconHTML

    The multicore era has brought to an end the trend of doubling single-thread performance with each generation of microprocessors. To continue scaling programmers must parallelize existing single-threaded applications. A lack of tools makes identifying program features and data-dependence relationships that bottleneck parallel performance a cumbersome ad-hoc task. This paper presents SPARTAN, a tool... View full abstract»

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  • Dynamic code footprint optimization for the IBM Cell Broadband Engine

    Publication Year: 2009, Page(s):64 - 72
    Cited by:  Papers (1)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (278 KB) | HTML iconHTML

    Multicore designers often add a small local memory close to each core to speed up access and to reduce off-chip IO. But this approach puts a burden on the programmer, the compiler, and the runtime system, since this memory lacks hardware support (cache logic, MMU, ...) and hence needs to be managed in software to exploit its performance potential. The IBM Cell Broadband Engine (Cell B. E.) is extr... View full abstract»

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  • Phase-guided thread-to-core assignment for improved utilization of performance-asymmetric multi-core processors

    Publication Year: 2009, Page(s):73 - 80
    Cited by:  Papers (8)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (440 KB) | HTML iconHTML

    CPU vendors are starting to explore trade offs between die size, number of cores on a die, and power consumption leading to performance asymmetry among cores on a single chip. For efficient utilization of these performance-asymmetric multi-core processors, application threads must be assigned to cores such that the resource needs of a thread closely matches resource availability at the assigned co... View full abstract»

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  • Transparent multi-core cryptographic support on Niagara CMT Processors

    Publication Year: 2009, Page(s):81 - 88
    Cited by:  Papers (1)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (259 KB) | HTML iconHTML

    How cryptographic functionality has been implemented and made available in application scenarios has evolved over time. Pure software implementations were the obvious first choice, followed by dedicated hardware devices, be it co-processors or hardware accelerators accessible on the main bus. This paper examines aspects of making the next step in this evolution work, namely the use of dedicated cr... View full abstract»

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