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Computers and Digital Techniques, IEE Proceedings E

Issue 1 • Date Jan 1993

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Displaying Results 1 - 10 of 10
  • Canonical restricted mixed-polarity exclusive-OR sums of products and the efficient algorithm for their minimisation

    Publication Year: 1993 , Page(s): 69 - 77
    Cited by:  Papers (2)
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (652 KB)  

    The concept of canonical restricted mixed polarity (CRMP) exclusive-OR sum of products forms is introduced. The CRMP forms include the inconsistent canonical Reed-Muller forms and the fixed-polarity Reed-Muller (FPRM) forms as special cases. The set of CRMP forms is included in the set of exclusive-OR sum-of-product (ESOP) expressions. An attempt to characterise minimal CRMP forms for completely specified Boolean functions is presented as well as an insight into the complexity of computation needed to find such a form. Some fundamental properties unique to CRMPs are proven. It is also proven that the upper bound on the number of terms in the CRMP form is smaller than that in the conventional normal forms and equal to that of the ESOPs. A theorem providing a lower bound on the number of CRMP terms is given. Finally, based on these theoretical results, a heuristic algorithm and its implementation to obtain a quasiminimal CRMP form for a multioutput function are presented. View full abstract»

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  • Space-time mapping, latency of data flow and concurrent error detection in systolic arrays

    Publication Year: 1993 , Page(s): 33 - 44
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (656 KB)  

    The problem of mapping a general iterative algorithm with nonunit increment/decrement steps of the loop indices onto a systolic array using space-time transformation is studied. Necessary and sufficient conditions for the existence of such a space-time mapping are presented. The latency of a systolic computation is characterised in terms of the spa-time mapping and the increment/decrement step size of the iterative algorithm. Formulas for the latency of linear and 2D systolic arrays are derived. An efficient space-time mapping using restricted row operations which guarantees unit latency, thereby maximising the utilisation of the processors, is also proposed. Necessary and sufficient conditions under which column operations can be used to derive a legitimate space-time mapping are presented. A theory relating concurrent error detection and space-time mapping in systolic arrays is proposed. Based on this theory, existing (ad hoc) concurrent error detection approaches can be explained. View full abstract»

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  • Low complexity Viterbi detector for magnetic disc drives

    Publication Year: 1993 , Page(s): 78 - 80
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (212 KB)  

    A signal detection scheme for magnetic disc drives based on maximum likelihood sequence detection is proposed which refers to a channel with RLL 1, 7 coding and features a trellis with three states and five transitions. Owing to the RLL 1, 7 code, clock recovery is more stable than in partial response coded systems. The decoding gain amounts to 5 dB, and may lead to an increase in capacity by a factor of 1.8 when used for reading narrower tracks. View full abstract»

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  • Parallel DFT computation on bit-serial systolic processor arrays

    Publication Year: 1993 , Page(s): 10 - 18
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (604 KB)  

    The paper shows how novel one-dimensional and two-dimensional systolic processing architectures, comprising up to N coordinate rotation digital computer (CORDIC) processing elements (PEs), can be used to carry out hardware-efficient parallel implementations of the N-point discrete Fourier transform (DFT), offering highly attractive throughput rates in relation to the conventional N-processor linear systolic array. The CORDIC PE is implemented in bit-serial form using single-bit half-adder (HA) and full-adder (FA) circuits. It is thus extremely efficient, in terms of speed/area product and possesses simple interconnects, facilitating the mapping of potentially thousands of such units onto a single chip. View full abstract»

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  • Implementation issues of 2-dimensional polynomial multipliers for signal processing using residue arithmetic

    Publication Year: 1993 , Page(s): 45 - 53
    Cited by:  Papers (3)
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (528 KB)  

    The residue number system (RNS) has been considered a useful tool for digital signal processing (DSP) since it can support parallel, carry-free, high-speed arithmetic. The polynomial residue number system (PRNS) enjoys all the RNS advantages and is capable of performing the useful DSP operation of polynomial multiplication in a totally parallel fashion and with minimum multiplication count provided that an appropriate modular arithmetic ring is chosen. However, the PRNS has one limitation: that is the size of the ring used for the arithmetic is proportional to the size of the polynomials to be multiplied. As a result, to multiply large polynomials in a fixed-size arithmetic ring, one must involve two-dimensional PRNS techniques. The authors describe these two-dimensional PRNS techniques and offer array implementations of two-dimensional PRNS polynomial multipliers. The proposed arrays are modular and pipelinable, and thus suitable for VLSI implementations. View full abstract»

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  • Generalisation of tri-state map and a composition method for minimisation of Reed-Muller polynomials in mixed polarity

    Publication Year: 1993 , Page(s): 59 - 64
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (432 KB)  

    The concept of tri-state map that is used to represent and to minimise the Reed-Muller polynomials for functions of six or fewer variables is generalised to functions of any number of variables. A minimisation method for Reed-Muller polynomials in mixed polarity known as the composition method is developed. It can be implemented by a tabular method as well as on computers. View full abstract»

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  • Moments of a crack coded blob

    Publication Year: 1993 , Page(s): 54 - 58
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (216 KB)  

    A method for the computation of moments up to the third order of a binary image or blob encoded in crack code is presented. The method uses the projections of the blob on lines at 0, pi /4, pi /2 and 3 pi /4, introduces no approximations, and substantially reduces the computational effort compared with other methods. View full abstract»

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  • Microprocessor systems diagnosis using a time-range approach

    Publication Year: 1993 , Page(s): 1 - 9
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (696 KB)  

    In many aspects of microprocessor systems design and diagnosis, temporal reasoning of a sequence of event changes occurring at imprecisely known time instants is often required. By combining the change-based and time-based approaches of temporal logics, the concept of time range is proposed as a key component of an enhanced time structure which captures the notion of time impreciseness in event occurrence. A practical MC68000 CPU-memory interface design problem is used as an extensive example to illustrate the various temporal reasoning techniques derived from this new time structure. Efficient methods for time referencing, constraint satisfaction and propagation of time ranges have been developed for embedding domain knowledge in a deep-level constraint model. It is also shown how different shallow rules (regarded as expert's rule of thumb) for system diagnosis can be generated and explained through an inference process of the constraint model. View full abstract»

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  • Performance models for message passing architectures

    Publication Year: 1993 , Page(s): 19 - 32
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (860 KB)  

    The authors discuss parametrised performance models for distributed memory machines with particular emphasis on transputer networks. Overheads are decomposed into three categories, namely scheduling, communication and synchronisation. The degradation resulting from each type of overhead is expressed as an efficiency parameter and half-performance parameters are derived for communication and synchronisation overheads. View full abstract»

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  • Decomposition method for minimisation of Reed-Muller polynomials in mixed polarity

    Publication Year: 1993 , Page(s): 65 - 68
    Cited by:  Papers (1)
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (232 KB)  

    A minimisation method for Reed-Muller polynomials in mixed polarity known as the decomposition method is developed. The method adopts the top-down approach in which the products of a Reed-Muller polynomial are decomposed from a 1-term list one by one. It can be implemented on computers. Tristate maps can also be used if the number of variables is equal to, or less than, six. View full abstract»

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