By Topic

IEEE Transactions on Computers

Issue 2 • Date Feb. 1977

Filter Results

Displaying Results 1 - 20 of 20
  • [Front cover]

    Publication Year: 1977, Page(s): c1
    Request permission for commercial reuse | PDF file iconPDF (449 KB)
    Freely Available from IEEE
  • IEEE Computer Society

    Publication Year: 1977, Page(s): nil1
    Request permission for commercial reuse | PDF file iconPDF (220 KB)
    Freely Available from IEEE
  • [Breaker page]

    Publication Year: 1977, Page(s): nil1
    Request permission for commercial reuse | PDF file iconPDF (220 KB)
    Freely Available from IEEE
  • Parallel Processors and Processing: An Introduction

    Publication Year: 1977, Page(s):97 - 98
    Cited by:  Papers (2)
    Request permission for commercial reuse | PDF file iconPDF (1202 KB)
    Freely Available from IEEE
  • Parallelism in Artificial Intelligence Problem Solving: A Case Study of Hearsay II

    Publication Year: 1977, Page(s):98 - 111
    Cited by:  Papers (38)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (4556 KB)

    The Hearsay II speech-understanding system (HSII) (Lesser et al [11], Fennell [9], and Erman and Lesser [6]) is an implementation of a knowledge-based multiprocessing artificial intelligence (AI) problem-solving organization. HSII is intended to represent a problem-solving organization which is applicable for implementation in a parallel hardware environment such as C.mmp (Bell et al [2]). The pri... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • The Associative Linear Array Processor

    Publication Year: 1977, Page(s):112 - 125
    Cited by:  Papers (21)  |  Patents (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (4178 KB)

    The associative linear array processor (ALAP) is a new approach to making large associative processors practical. Data storage in shift registers, bit-serial arithmetic, LSI word cells comprehensive arithmetic capability within the memory array, and electronic fault isolation are all utilized. The processor is a linear array of word cells, each containing memory and arithmetic logic. All connectio... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • On a Varistructured Array of Microprocessors

    Publication Year: 1977, Page(s):125 - 138
    Cited by:  Papers (11)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (4676 KB)

    The varistructure architecture gives the user the opportunity to specify the height and width of his primary memory ``at run time.'' This architecture, first proposed in 1973, has now been simplified to make it schedulable, extended to allow SIMD vector-vector operations, and further extended to provide variable structure within a task. Memory is efficiently utilized in that memory bandwidth can b... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • A Data Flow Multiprocessor

    Publication Year: 1977, Page(s):138 - 146
    Cited by:  Papers (45)  |  Patents (11)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2692 KB)

    This paper presents the architecture of a highly concurrent multiprocessor which runs programs expressed in data flow notation. Sequencing of data flow instruction execution depends only on the availability of operands required by instructions. Because data flow instructions have no side effects, unrelated instructions can be executed concurrently without interference if each has its required oper... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • A Parallel QR Algorithm for Symmetric Tridiagonal Matrices

    Publication Year: 1977, Page(s):147 - 153
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2371 KB)

    We show that if the size of the tridiagonal matrix in any given iteration is n, then the parallel QR algorithm requires 0(log2n) steps with 0(n) processors per iteration and no square roots. This results in a speedup of 0(n/log2n) over the sequential algorithm with an efficiency of 0(1/log2n). We also give an error analysis of the parallel triangular system solvers... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Analysis Techniques for SIMD Machine Interconnection Networks and the Effects of Processor Address Masks

    Publication Year: 1977, Page(s):153 - 161
    Cited by:  Papers (64)  |  Patents (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3253 KB)

    Various techniques for evaluating and comparing interconnection networks for SIMD machines are presented. These techniques are demonstrated by using them to analyze the networks that have been proposed in the literature. The model of SIMD machines used in the first part of the paper requires all data transfers between processing elements to be representable as permutations on the processing elemen... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Organization of Semiconductor Memories for Parallel-Pipelined Processors

    Publication Year: 1977, Page(s):162 - 169
    Cited by:  Papers (25)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2203 KB)

    An organization of interleaved multimodule semiconductor memories is studied to facilitate accessing of memory words by a parallel-pipelined processor. All modules are assumed to be identical and to have address cycle (address hold time) and memory cycle of a and c segment time units, respectively. A total of N(=2n) memory modules are arranged such that there are l(=2b) lines... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • An Optimal Frame Synchronization Technique Using an Associative Processor

    Publication Year: 1977, Page(s):170 - 174
    Cited by:  Patents (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (909 KB)

    Data loss resulting from the time to regain frame synchronization following detection of an out-of-frame condition on a synchronous time-division multiplexed bus or line, such as the Bell System T1 digital line, can be substantial. Most current sequential schemes require many frame times to separate with high probability the true frame pattern from identical patterns occurring temporarily in rando... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • The Multidimensional Access Memory in STARAN

    Publication Year: 1977, Page(s):174 - 177
    Cited by:  Papers (73)  |  Patents (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (658 KB)

    STARAN® has a number of array modules, each with a multidimensional access (MDA) memory. The implementation of this memory with random-access memory (RAM) chips is described. Because data can be accessed in either the word direction or the bit-slice direction, associative processing is possible without the need for costly, custom-made logic-in-memory chips. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Detecting Natural ``Plateaus'' in One-Dimensional Patterns

    Publication Year: 1977, Page(s):178 - 179
    Cited by:  Papers (8)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (342 KB)

    A method of detecting natural ``plateaus'' (equals maximal intervals of approximately constant value) in a one-dimensional pattern is described. The method is based on examining neighborhoods of each point having a range of sizes; rejecting neighborhoods of each size for which the standard deviation (of pattern values over the neighborhood) is not a local minimum; and further rejecting any neighbo... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Computer Analysis of Planar Curvilinear Moving Images

    Publication Year: 1977, Page(s):179 - 185
    Cited by:  Papers (43)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (875 KB)

    The present correspondence develops an algorithm for tracking the motion of planar curvilinear moving objects from a sequence of scenes produced by a television camera. The shape of the objects is unrestricted except that holes may not be present. The shape of the objects may vary slightly from scene to scene. The linear and angular velocities of the objects are computed, and a model is created an... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Use of Postfix Notation for the Description of Microcellular Arrays

    Publication Year: 1977, Page(s):185 - 191
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (916 KB)

    A correspondence is established between arbitrary switching functions expressed in Polish postfix notation and the members of a class of microcellular arrays. The topology of this class of microcellular array is more apparent in postfix notation than in conventional notation, and it is conjectured that optimal realizations of switching functions within these arrays may be produced by manipulation ... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Comments on "On the Floating Point Representation of Complex Numbers

    Publication Year: 1977, Page(s): 191
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (169 KB)

    A recent paper1 discussed an integrated notation for complex numbers. A second choice of the radix point position will increase the number of values near the origin. An argument is also made for unnormalized notation of both parts of a complex number. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Author's Reply

    Publication Year: 1977, Page(s): 192
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (47 KB)

    Summary form only give, as follows. Bauer is quite correct in pointing out that the use of unnormalized floating point format improves the overall accuracy of the representation. It is therefore intriguing to ask why more manufacturers have not adopted it. Presumably most designers prefer to keep floating point number representations unique. In some computers the leading bit of each mantissa is dr... View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • IEEE Computer Society Publications

    Publication Year: 1977, Page(s): nil2
    Request permission for commercial reuse | PDF file iconPDF (136 KB)
    Freely Available from IEEE
  • [Front cover]

    Publication Year: 1977, Page(s): c2
    Request permission for commercial reuse | PDF file iconPDF (134 KB)
    Freely Available from IEEE

Aims & Scope

The IEEE Transactions on Computers is a monthly publication with a wide distribution to researchers, developers, technical managers, and educators in the computer field.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief
Paolo Montuschi
Politecnico di Torino
Dipartimento di Automatica e Informatica
Corso Duca degli Abruzzi 24 
10129 Torino - Italy
e-mail: pmo@computer.org