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IEEE Transactions on Computers

Issue 6 • Date June 1973

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Displaying Results 1 - 22 of 22
  • [Front cover]

    Publication Year: 1973, Page(s): c1
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  • IEEE Computer Society

    Publication Year: 1973, Page(s): nil1
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  • [Breaker page]

    Publication Year: 1973, Page(s): nil1
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  • Computer Arithmetic: An Introduction and Overview

    Publication Year: 1973, Page(s):549 - 551
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  • Computation Times of Arithmetic and Boolean Functions in (d, r) Circuits

    Publication Year: 1973, Page(s):552 - 555
    Cited by:  Papers (8)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1530 KB)

    A (d, r) circuit is a d-valued logical circuit in which each element has fan-in at most r and can compute any r-argument d-valued logical function in unit time. In this paper we review results previously published on the computation time of such circuits for addition and multiplication and for computation of general Boolean functions. We also explicitly state hitherto unpublished but known results... View full abstract»

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  • The Status of Investigations into Computer Hardware Design Based on the Use of Continued Fractions

    Publication Year: 1973, Page(s):555 - 560
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2570 KB)

    The purpose of this paper is to demonstrate that representations of numbers other than positional notation may lead to practical hardware realizations for digital calculation of classes of algorithms. This paper describes current research in the use of continued fractions. Although practicality has not been demonstrated, theoretical results are promising. View full abstract»

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  • Radix-16 Evaluation of Certain Elementary Functions

    Publication Year: 1973, Page(s):561 - 566
    Cited by:  Papers (31)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1326 KB)

    This paper describes a family of algorithms for evaluation of a class of elementary functions including division, logarithms, and exponentials. The main objective is to demonstrate the feasibility of higher radix implementations, in particular, radix 16, and to compare performance with radix 2. The emphasis is not on optimality of a single algorithm, but rather on the optimality of a class of algo... View full abstract»

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  • Arithmetic Algorithms for Error-Coded Operands

    Publication Year: 1973, Page(s):567 - 572
    Cited by:  Papers (36)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1836 KB)

    A set of arithmetic algorithms is described for operands that are encoded in the ``AN'' error-detecting code with the low-cost check modulus A = 2a - 1. The set includes addition additive inverse (complementation), multiplication, division, roundoff, and two auxiliary algorithms: ``multiply by 2a - 1,'' and ``divide by 2a - 1.'' The design of a serial radix-16 proc... View full abstract»

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  • Analyzed Binary Computing

    Publication Year: 1973, Page(s):573 - 576
    Cited by:  Papers (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1435 KB)

    A single format for the representation of numbers in a computer is proposed to accommodate both exact and inexact quantities. A consistent set of rules is described for addition (subtraction), multiplication, and division of such quantities, both within their separate types, as well as in combination. Error correlation aside, the propagation of inherent errors is monitored in operations with at le... View full abstract»

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  • Roundings in Floating-Point Arithmetic

    Publication Year: 1973, Page(s):577 - 586
    Cited by:  Papers (24)  |  Patents (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2933 KB)

    In this paper we discuss directed roundings and indicate how hardware might be designed to produce proper upward directed, downward directed, and certain commonly used symmetric roundings. Algorithms for the four binary arithmetic operations and for rounding are presented, together with proofs of their correctness; appropriate formulas for a priori error analysis of these algorithms are presented.... View full abstract»

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  • A Simulative Study of Correlated Error Propagation in Various Finite-Precision Arithmetics

    Publication Year: 1973, Page(s):587 - 597
    Cited by:  Papers (15)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1977 KB)

    The accumulated roundoff error incurred in long arithmetic computations involving a randomized mixture of addition, subtraction, multiplication, and division operations applied to an initial randomly generated data base is studied via simulation. Truncated and rounded floating-point arithmetic and truncated and rounded logarithmic arithmetic are simultaneously utilized for each of the computation ... View full abstract»

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  • Static and Dynamic Numerical Characteristics of Floating-Point Arithmetic

    Publication Year: 1973, Page(s):598 - 601
    Cited by:  Papers (20)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1394 KB)

    The appearance of hexadecimal floating-point arithmetic systems has prompted a continuing discourse on the relative numerical merits of various choices of base. Until lately this discourse has centered around the static properties of the floating-point representation of numbers, and has primarily concerned only binary and hexadecimal representations. Recent events may change this discourse conside... View full abstract»

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  • On the Precision Attainable with Various Floating-Point Number Systems

    Publication Year: 1973, Page(s):601 - 607
    Cited by:  Papers (20)  |  Patents (2)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2420 KB)

    For scientific computations on a digital computer the set of real numbers is usually approximated by a finite set F of ``floating-point'' numbers. We compare the numerical accuracy possible with different choices of F having approximately the same range and requiring the same word length. In particular, we compare different choices of base (or radix) in the usual floating-point systems. The emphas... View full abstract»

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  • A Combinatoric Division Algorithm for Fixed-Integer Divisors

    Publication Year: 1973, Page(s):608 - 610
    Cited by:  Papers (8)  |  Patents (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (394 KB)

    A procedure is presented for performing a combinatoric fixed-integer division that satisfies the division algorithm in regard to both quotient and remainder. In this procedure, division is performed by multiplying the dividend by the reciprocal of the divisor. The reciprocal is, in all nontrivial cases, of necessity a repeating binary fraction, and two treatments for finding the product of an inte... View full abstract»

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  • A Unified Approach to the Evaluation of a Class of Replacement Algorithms

    Publication Year: 1973, Page(s):611 - 618
    Cited by:  Papers (38)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2083 KB)

    The replacement problem arises in computer system management whenever the executable memory space available is insufficient to contain all data and code that may be accessed during the execution of an ensemble of programs. An example of this is the page replacement problem in virtual memory computers. The problem is solved by using a replacement algorithm that selects code or data items that are t... View full abstract»

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  • Circuit Structure and Switching Function Verification

    Publication Year: 1973, Page(s):618 - 625
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2224 KB)

    A new approach is presented for the design of multiple fault detection tests in which the structure of a combinational circuit is used to reduce the number of input combinations required. The structure is defined by the interconnection of the basic elements, each of arbitrary complexity. The fault model assumes that the functions realized by the basic elements may undergo any deviation whatsoever,... View full abstract»

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  • A Note on Conditional-Sum Addition for Base - 2 Systems

    Publication Year: 1973, Page(s): 626
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (222 KB)

    Conditional-sum addition in a -2 base system and its comparison with normal binary conditional-sum addition is discussed. It is found that approximately 2.0 to 2.5 times as much hardware is required for this high-speed addition method in the negative binary system as compared to the positive binary system. View full abstract»

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  • Comments on "Decomposition Method of Determining Maximum Compatibles

    Publication Year: 1973, Page(s): 627
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (135 KB)

    Some comments are made on the above note,1 to indicate that the decomposition relations used in this technique can be obtained in a much simpler way and to point out that the technique has been mentioned earlier in the literature. View full abstract»

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  • Authors' reply

    Publication Year: 1973, Page(s): 627
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  • Book Reviews

    Publication Year: 1973, Page(s): 628
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  • Information for authors

    Publication Year: 1973, Page(s): nil2
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  • [Front cover]

    Publication Year: 1973, Page(s): c2
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Aims & Scope

The IEEE Transactions on Computers is a monthly publication with a wide distribution to researchers, developers, technical managers, and educators in the computer field.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief
Paolo Montuschi
Politecnico di Torino
Dipartimento di Automatica e Informatica
Corso Duca degli Abruzzi 24 
10129 Torino - Italy
e-mail: pmo@computer.org