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Computers, IEEE Transactions on

Issue 2 • Date Feb. 1972

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Displaying Results 1 - 25 of 29
  • [Front cover]

    Page(s): c1
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  • IEEE Computer Society

    Page(s): nil1
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  • [Breaker page]

    Page(s): nil1
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  • Editor's Notice

    Page(s): 129
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  • Redundancy by Coding Versus Redundancy by Replication for Failure-Tolerant Sequential Circuits

    Page(s): 130 - 137
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    A synthesis procedure for failure-tolerant sequential circuits using error-correcting codes is presented. Coding redundancy is then compared with replication as to circuit complexity and reliability improvement. Using appropriate assumptions, it is shown that for a specified ability to tolerate failures, replication yields better circuit reliability than coding redundancy. When circuit complexity as well as reliability are taken into consideration, it is shown that schemes based on orthogonizable codes generally provide a greater improvement in reliability for a given complexity than replication. As in any redundant scheme, these results presuppose reasonably good reliabilities for irredundant circuits. View full abstract»

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  • Optimal Scheduling Strategies in a Multiprocessor System

    Page(s): 137 - 146
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    This paper describes a set of techniques that can be used to optimally schedule a sequence of interrelated computational tasks on a multiprocessor computer system. Using a directed graph model to represent a computational process, two basic problems are solved here. First, given a set of computational tasks and the relationships between them, the tasks are scheduled such that the total execution time is minimized, and the minimum number of processors required to realize this schedule is obtained. The second problem is of a more general nature. Given k processors, the tasks are scheduled such that execution time is again minimized. Consideration is given to tasks of equal and unequal duration, and task preemption is not allowed. View full abstract»

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  • On the Tradeoff Between Logic Performance and Circuit-to-Pin Ratio for LSI

    Page(s): 147 - 153
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    A key problem in the effective use of large-scale integration is the design and partitioning of computer logic to achieve sufficiently high circuit-to-pin ratios. In this paper a power-law relationship between pins and partitioned circuits is discussed and empirical evidence is presented that implies that the pin requirement is a sensitive function of the performance level of the logic. Two techniques for increasing the circuit-to-pin ratio are discussed. The first is to serialize the interchip transfer of information that results in a degradation in performance of the logic. The second is to encode the information to be transferred so that fewer pins are required but without reducing the performance. The results of experiments using the encoding principle to map a small logic graph onto chips are presented to obtain an indication of the effectiveness of this technique. It is shown that the relationship between circuits and pins when using encoding remains a power law. View full abstract»

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  • Optimal Networks of NOR-OR Gates for Functions of Three Variables

    Page(s): 153 - 160
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    Optimal networks consisting of NOR-OR gates (each gate produces the NOR and/or the OR of its inputs) are tabulated for all Boolean functions of three variables. Optimality is defined as minimizing first the number of gates and then the number of interconnections. The optimal networks were synthesized for each Boolean function by using an integer programming synthesis technique. View full abstract»

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  • A Prototype Intelligent Robot that Assembles Objects from Plan Drawings

    Page(s): 161 - 170
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    An intelligent robot that recognizes and assembles three-dimensional objects by means of vidicon cameras, an articulated mechanical hand, and a digital computer is described. Its problem-solving functions include three essential parts: the recognition of macro-instructions from a human master, the recognition of the objects to be handled, and the decision making for executing the necessary tasks. The instruction is in the form of a three-view plan of a simple polyhedral assemblage whose overall spatial configuration is recognized together with its component parts. In this process the set of planes of the assemblage is disassembled into open shells; these are then reconstructed into closed shells to find the parts by solving a linear equation where the shell vectors are taken into consideration. In the object recognition, all the geometric features of polygonal prisms in the field of vision are extracted to find the specific parts required for the assembly. Further computation is made to search for the assembly procedure and is based on the restraint vectors of each object and consequent disassembly free. Finally, the mechanical hand starts the autonomous manipulation of the parts so as to accomplish the assigned assembly. View full abstract»

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  • A Nonparametric Valley-Seeking Technique for Cluster Analysis

    Page(s): 171 - 178
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    The problem of clustering multivariate observations is viewed as the replacement of a set of vectors with a set of labels and representative vectors. A general criterion for clustering is derived as a measure of representation error. Some special cases are derived by simplifying the general criterion. A general algorithm for finding the optimum classification with respect to a given criterion is derived. For a particular case, the algorithm reduces to a repeated application of a straightforward decision rule which behaves as a valley-seeking technique. Asymptotic properties of the procedure are developed. Numerical examples are presented for the finite sample case. View full abstract»

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  • A Class of Algorithms for Fast Digital Image Registration

    Page(s): 179 - 186
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    The automatic determination of local similarity between two structured data sets is fundamental to the disciplines of pattern recognition and image processing. A class of algorithms, which may be used to determine similarity in a far more efficient manner than methods currently in use, is introduced in this paper. There may be a saving of computation time of two orders of magnitude or more by adopting this new approach. The problem of translational image registration, used for an example throughout, is discussed and the problems with the most widely used method-correlation explained. Simple implementations of the new algorithms are introduced to motivate the basic idea of their structure. Real data from ITOS-1 satellites are presented to give meaningful empirical justification for theoretical predictions. View full abstract»

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  • On the Definition and Generation of Walsh Functions

    Page(s): 187 - 189
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    A proof is given of a method proposed by Lackey and Meltzer [2] for determining the selection of Rademacher functions that must be combined to generate a specified Walsh function. The method provides a convenient way of digitally controlling a Walsh function generator. View full abstract»

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  • Path Sensitization, Partial Boolean Difference, and Automated Fault Diagnosis

    Page(s): 189 - 195
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    A tool employed in automated fault diagnosis is emphasized: path sensitization by partial Boolean difference analysis. Motivated by the analogy between a test system and a communication system, a model for fault detection of a logic net is outlined from the standpoint of information theory. The classical ``path sensitizing'' technique is made systematic using the partial Boolean difference. This technique is based on a new theorem on the partial Boolean difference. Finally, a programmable fault detection algorithm is presented along with an example. View full abstract»

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  • Fourier Preprocessing for Hand Print Character Recognition

    Page(s): 195 - 201
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    A pattern-recognition method, making use of Fourier transformations to extract features which are significant for a pattern, is described. The ordinary Fourier coefficients are difficult to use as input to categorizers because they contain factors dependent upon size and rotation as well as an arbitrary phase angle. From these Fourier coefficients, however, other more useful features can easily be derived. By using these derived property constants, a distinction can be made between genuine shape constants and constants representing size, location, and orientation. The usefulness of the method has been tested with a computer program that was used to classify 175 samples of handprinted letters, e.g., 7 sets of the 25 letters A to Z. In this test, 98 percent were correctly recognized when a simple nonoptimized decision method was used. The last section contains some considerations of the technical realizability of a fast preprocessing system for reading printed text. View full abstract»

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  • Results Obtained Using a Simple Character Recognition Procedure on Munson's Handprinted Data

    Page(s): 201 - 205
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    The number of black points in each of the 25 nonoverlapping square regions of a size-normalized character matrix were used to recognize the 3822 uppercase handprinted alphabetic characters from Munson's multiauthor data set. The recognition accuracy obtained using a Bayes' classifier, which assumes statistically independent features, compares favorably with earlier results obtained using recognition systems having complexity comparable to ours. Included are results and a recommendation regarding system evaluation procedures. View full abstract»

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  • Polynomial Representation of Classifiers with Independent Discrete-Valued Features

    Page(s): 205 - 208
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    It is shown that for n-valued conditionally independent features a large family of classifiers can be expressed as an (n¿1)st-degree polynomial discriminant function. The usefulness of the polynomial expansion is discussed and demonstrated by considering the first-order Minkowski metric, the Euclidean distance, and Bayes' classifiers for the ternary-feature case. Finally, some interesting side observations on the classifiers are made with respect to optimality and computational requirements. View full abstract»

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  • On the Existence of a Periodic Analog of a Finite Connected Automaton

    Page(s): 208 - 211
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    The solution of the problem of the existence of an analog with periodic-variable structure of a given fixed-structure connected automaton is presented. Using a Boolean approach, a necessary and sufficient condition for the existence of the periodic analog is proven, and an algorithm that enables us to actually find this analog is given. The saving of the memory capacity needed for the construction of a given automaton is the main interest of the existence of a periodic analog. View full abstract»

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  • Orthogonal Expansion of Many-Valued Logical Functions and its Application to their Realization with a Single-Threshold Element

    Page(s): 211 - 218
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    The orthogonal expansion of many-valued logical functions is described and some approximate forms derived from it are discussed. A method of logical design of many-valued functions, especially threshold functions, using a single-threshold element is proposed based on the approximate forms. View full abstract»

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  • Transference of Learning Between Recognition Classes

    Page(s): 219 - 220
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    To demonstrate transference, experiments have been carried out in which the recognition of Highleyman's handprinted numerals was a few percent more accurate when numerals and letters were used as a training set than when only numerals were used as a training set. View full abstract»

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  • Comment on "A Nonlinear Mapping for Data Structure Analysis

    Page(s): 220 - 221
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    An alternative metric for use with Sammon's nonlinear mapping is suggested. Rather than Euclidean, the Hamming metric is proposed as a means of reducing the iteration time. View full abstract»

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  • Contributors

    Page(s): 221 - 223
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  • Book Review

    Page(s): 224
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  • Abstracts of Current Computer Literature

    Page(s): 225 - 235
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  • Descriptor-in-Context Index

    Page(s): 236 - 239
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Aims & Scope

The IEEE Transactions on Computers is a monthly publication with a wide distribution to researchers, developers, technical managers, and educators in the computer field.

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Meet Our Editors

Editor-in-Chief
Albert Y. Zomaya
School of Information Technologies
Building J12
The University of Sydney
Sydney, NSW 2006, Australia
http://www.cs.usyd.edu.au/~zomaya
albert.zomaya@sydney.edu.au