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Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures

Issue 6 • Date Nov 1990

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Displaying Results 1 - 25 of 164
  • Issue Table of Contents

    Page(s): toc1
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    Freely Available from IEEE
  • Properties of silicon dioxide films prepared by low‐pressure chemical vapor deposition from tetraethylorthosilicate

    Page(s): 1177 - 1184
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    The 20 to 100‐nm thick tetraethylorthosilicate (TEOS)‐derived SiO2 films were deposited on silicon substrates in the 650–780 °C temperature range by low‐pressure chemical vapor deposition. The main properties of the as‐deposited and annealed films such as refractive index, etch rate, stress, step coverage, and density are reported. Infrared (IR) spectra and the electrical properties were studied as a function of process parameters including temperature, pressure, oxygen, and TEOS flow. These studies have shown that TEOS‐SiO2 films have very good thickness uniformity and conformal step coverage which can be controlled by adjusting the process pressure. IR spectra show that TEOS‐SiO2 films are deposited as stoichiometric oxides. Annealing results in the removal of absorbed water and Si–OH groups, and in an increase of the number of Si–O–Si bonds. The electrical characteristics, such as breakdown field strength for films deposited on POCl3 ‐doped polysilicon, are comparable to those of SiO2 films thermally grown at 1100 °C in dry O2 atmosphere. View full abstract»

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  • Radio frequency plasma etching of Si/SiO2 by Cl2/O2 : Improvements resulting from the time modulation of the processing gases

    Page(s): 1185 - 1191
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    The etching of poly‐Si and its selectivity over gate oxide SiO2 were measured for both Cl2 and Cl2/O2 plasmas and the experimental data indicate that modulation of the processing gases increases the Si/SiO2 selectivity while decreasing the unwanted deposition. The best results to date have been Si etch rates of ∼1000 Å/min and Si/SiO2 selectivities of ∼50, and it has been demonstrated that the Si/SiO2 selectivity is critically related to the presence of photoresist. A qualitative model for these results is proposed which appears to fit these observations. In this model, hydrocarbon fragments from sputtered photoresist reduces the SiO2 to Si, with a corresponding decrease in the Si/SiO2 etching selectivity. This carbonaceous material can be removed by the oxygen before it causes etching damage to the SiO2. Oxygen, unfortunately, can also react with the etching reaction products (e.g., SiCl4 ) to form SiO2 and the Si oxy‐chlorides (Si2OCl6, Si3OCl8 ) which deposit on the wafer. The experimental evidence indicates, however, that this unwanted deposition can be minimized by alternating the Cl2 and O2 gases, rather than by running them both at a constant pressure as is typically done. Of most immediate interest is the fact that this modulation improvement can be achieved on time scales (≳1 s) which are attainable with the fairly slow residence times available in present generation hex etchers. View full abstract»

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  • Extremely high selective, highly anisotropic, and high rate electron cyclotron resonance plasma etching for n+ poly‐Si at the electron cyclotron resonance position

    Page(s): 1192 - 1198
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    Extremely high selective, highly anisotropic, and high rate electron cyclotron resonance (ECR) plasma etching for n+ poly‐Si is achieved at the ECR position in a newly developed ECR plasma etching system. The selectivity ratio of the n+ poly‐Si etching rate to the SiO2 etching rate is more than 100 at 5×10-4 Torr and 260 at 3×10-3 Torr in pure Cl2 gas at a substrate temperature of 30 °C. Furthermore, the selectivity ratio increases infinitely by using a Cl2/O2 gas mixture at 5×10-4 Torr. The n+ poly‐Si etching rate is more than 3000 Å/min with no radio frequency (rf) bias under the above selectivity ratio conditions. The etching selectivity is generated by low ion energy at the ECR position. The high etching rate is achieved by high ion current density at the ECR position in the plasma chamber. View full abstract»

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  • Study of sidewall passivation and microscopic silicon roughness phenomena in chlorine‐based reactive ion etching of silicon trenches

    Page(s): 1199 - 1211
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    Sidewall passivation layers produced in the formation of Si trenches by HCl/O2/BCl3 reactive ion etching have been characterized by angle‐resolved x‐ray photoemission measurements and secondary electron microscopy. Electron‐shading effects observed at grazing electron emission angles and electrostatic charging of insulating portions have been used to differentiate photoemission contribution from (i) the trench sidewall film (moderately insulating), (ii) the oxide mask (highly insulating), and (iii) the Si trench bottom (conductive). The sidewall passivation film for this process is found to be a silicon oxide. Only minor amounts of chlorine are incorporated in this film. The thickness of the sidewall passivation layer depends on the width of the Si trench and ranges from ≂0.1 μm for narrow trenches to ≂0.7 μm for wide Si trenches for our conditions. The Si taper formed in this trench etching process is produced by the simultaneous formation of the sidewall film which protects the underlying Si from etching. It is also shown that microscopic silicon pillars (‘‘black silicon’’ or ‘‘grass’’) form by micromasking under process conditions where large areas of unmasked silicon are exposed. The microscopic Si pillars are protected by the same sidewall passivation film as the trench sidewalls. Islands of black silicon are observed only in large open silicon areas and separated from oxide masked areas by a characteristic distance which is free of silicon pillars. This roughness‐free distance is of the order of the mask thickness employed. Ion scattering from the sloped mask sidewalls and sputtering of involatile micromasking material can explain this observation. Our results are consistent with a mechanism in which the processes that cause the formation of the beneficial sidewall film also initiate and control the production of u- - ndesirable silicon roughness in large unmasked Si regions. View full abstract»

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  • A thermochemical model for the plasma etching of aluminum in BCl3/Cl2 and BBr3/Br2

    Page(s): 1212 - 1222
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    This article describes a quantitative Recipe Map which has been constructed to target the controllable gas flows, wafer loading, and temperature settings predicted to result in the optimum BCl3/Cl2 and BBr3/Br2 plasma etching of aluminum for a given reactor and background oxygen pressure. The numerical predictions of this Recipe Map are based on modeling the plasma as a steady state flow system in which all thermodynamically predicted chemical reactions occur with collision limited kinetics, and where, in addition, physical sputtering removes material from the ion‐bombarded surfaces. Anisotropic etching is caused by the sputtering of deposited oxide which allows the chemical etching of the underlying Aluminum. Although this model is very simple, its numerical predictions are in good qualitative agreement with the observed Al etching dependence on the processing parameters in both single wafer and hex etchers. In particular, the effect of wafer loading can be quantitatively evaluated using simple formulas. View full abstract»

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  • Disintegration of TiSi2 on narrow poly‐Si lines at high temperatures

    Page(s): 1223 - 1231
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    The thermal stability of TiSi2/poly‐Si structures with narrow lines has been studied as a function of the dopants introduced into the poly‐Si (i.e. boron or arsenic) in the temperature range from 700 °C to 950 °C. The silicide layer was formed by rapid thermal processing (RTP) in nitrogen via a solid–solid reaction between titanium and poly‐Si. The integrity, upon heat treatment, of the TiSi2 film on large areas was investigated by Rutherford backscattering spectroscopy (RBS) analysis, plan‐view scanning electron microscopy (SEM), and cross‐sectional SEM studies. Electrical information about the thermal stability of the bilayer was obtained from sheet resistance measurements on Van der Pauw structures in combination with linewidth measurements of bridge resistors with a nominal width between 0.8 and 1.5 μm. To provide for statistical variation about one hundred measurements were collected for each linewidth and temperature setting. The results clearly show that the thermal stability of the bilayer is a function of the amount and type of dopants in the polysilicon, favoring the use of high levels of arsenic. Moreover, the thermal stability was observed to be affected by the linewidth, since at the temperature for onset of degradation (above 900 °C), narrow lines were found to disintegrate at a much higher rate than wider ones. Cross‐sectional SEM and TEM micrographs of the polycide lines clearly reveal the TiSi2/poly‐Si interface to suffer from bowing. The effect was observed to be more pronounced on narrow undoped and boron‐doped polycide lines. Both the narrow line disintegration and the bowing effect of polycide structures can have important implications for submicron very large scale integrated (VLSI) technologies. View full abstract»

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  • Stress migration resistance and contact characterization of Al–Pd–Si interconnects for very large scale integrations

    Page(s): 1232 - 1238
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    Stress‐induced migration resistance and contacts to silicon of Al–0.3%Pd–1%Si interconnections for submicron process integrated circuit devices have been investigated and compared to Al–0.5%Cu–1%Si. Using creep tests, Pd has been found to be an excellent additional element to Al for reducing grain boundary diffusion. Palladium improved the stress‐induced migration resistance and reduced void and hillock formation in Al–Si conductors. Aluminum palladium precipitates in Al–Pd–Si alloys were found to be formed at higher temperatures than aluminum copper compounds and may be the reason for the improvements. The contact resistance of Al–Pd–Si was found to be similar to that of Al–Cu–Si. The reliability and yield data from 1.2 μm ROM test devices using Al–Pd–Si conductors is better than that of Al–Cu–Si conductors. View full abstract»

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  • Capillary‐type cluster ion source and its application for selective deposition of aluminum film

    Page(s): 1239 - 1241
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    Cluster ions of acetone and triisobutylaluminum (TIBA) are generated from an apex of a capillary tube with an inner diameter of 5 μm and outer diameter of 20 μm, based on the atomization of a semiconductive liquid in high electrostatic field. Ion emission has an onset at a threshold voltage of around 2 kV, which is nearly equal to the value calculated from Taylor’s argument. The averaged charge‐to‐mass ratio of these cluster ions is determined to be 4.0–4.7 Coulomb/kg from a time‐of‐flight method. Spatially selected chemical vapor deposition of aluminum films is realized by the cluster ions of TIBA. View full abstract»

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  • A unified line‐of‐sight model of deposition in rectangular trenches

    Page(s): 1242 - 1248
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    The integro‐differential equations which describe free molecular flow in long rectangular trenches in the absence of deposition and to both low pressure chemical vapor deposition (LPCVD) and physical vapor deposition (PVD) are derived. A pseudosteady state assumption is implicit in the formulation, i.e., the feature dimensions change slowly relative to the time required for the flux to redistribute in response to the changes. Numerical solution of the governing equations provides film and deposition rate profiles as a function of deposition time until the trench is completely filled. Solutions are discussed for selected values of the sticking coefficient from zero to unity. The calculated film profiles are consistent with empirical results which typically show poor uniformity in PVD and step coverage increasing with decreasing sticking coefficient in LPCVD. Film profiles compare well with Monte Carlo based simulations of deposition processes. View full abstract»

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  • Rapid thermal processing systems: A review with emphasis on temperature control

    Page(s): 1249 - 1259
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    This paper highlights the basic principles of rapid thermal processing (RTP) systems and the important areas of concern. The basic system characteristics, the fundamental physics involved, and the techniques for temperature measurement and control are extensively reviewed. We summarize the options currently available for 15 RTP equipment manufacturers and point out the latest developments in RTP system design and temperature measurement. Some novel options for temperature control (optical, fiber optical, and photoacoustic) are included. View full abstract»

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  • A Zn predeposition technique applied to GaAs/AlGaAs heterobipolar transistors

    Page(s): 1260 - 1263
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    A Zn predeposition technique has been developed for forming the extrinsic base regions of HBTs. Zn ions are implanted in a shallow region of the p‐base region, followed by a quick diffusion using rapid thermal annealing (RTA) at a relatively low temperature of 650 °C. The resultant heavily doped extrinsic base region has less defects at the vicinity of the p‐base region than those obtained from conventional Be or Mg ion implantation. Experimentally fabricated HBTs using the new technique have shown more than twice the current gain than reference devices fabricated through Be ion implantation owing to reduced recombination centers in the extrinsic base region. View full abstract»

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  • High‐temperature growth of Si‐doped AlGaAs by molecular‐beam epitaxy

    Page(s): 1264 - 1269
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    We studied the growth rate, AlAs mole fraction, surface morphology, and electrical properties of Si‐doped AlxGa1-xAs (0≤x≤0.3) layers grown by molecular‐beam epitaxy at substrate temperatures from 620 to 770 °C. From the dependence of the growth rates and the AlAs mole fraction on the substrate temperature, we showed that the equilibrium partial pressure of Ga, Al, and As molecules at the growth surface governs the growth rates and the AlAs mole fraction of the epitaxial layers grown at these temperatures. This paper also deals with the growth mechanism of the smooth surface morphology of AlxGa1-xAs grown between 700 and 750 °C using the bonding energy of Al–As and Ga–As. Above 700 °C, the free electron concentration and the mobility of the Si‐doped AlxGa1-xAs epitaxial layers were reduced. In particular, the electron concentration and the mobility of AlxGa1-xAs were significantly decreased by intervalley scattering because of incremented AlAs mole fraction. Secondary ion mass spectroscopy showed us that carbon incorporation into the AlxGa1-xAs increased with substrate temperature. We discuss the substrate temperature dependence of mobility and concentration of a two‐dimensional electron gas in selectively doped GaAs/N‐AlxGa1-xAs heterostructures at 77 K. View full abstract»

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  • Temperature dependence of current conduction in barrier‐enhanced, carbon delta‐doped GaAs diodes

    Page(s): 1270 - 1273
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    The temperature dependencies of Schottky barrier height, ideality factor, and reverse bias breakdown voltage are reported for Ti/Pt/Au contacts on n‐type GaAs containing zero, one, or two near‐surface, carbon δ‐doped (p=7×1019 cm-3) layers, each ∼50 Å wide. Arrhenius plots of the total current flowing under forward bias in each structure yield effective barrier heights of 0.73, 0.91, and 0.65 eV, respectively, as the transition is made from barrier enhancement (reduced thermionic emission) to barrier lowering (increased tunneling). Both the ideality factor and breakdown voltage degrade with increasing measurement temperature. View full abstract»

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  • Use of hydrogenated chlorofluorocarbon mixtures for reactive ion etching of In‐based III–V semiconductors

    Page(s): 1274 - 1284
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    The reactive ion etching (RIE) of InP, InAs, InSb, InGaAs, and AlInAs in CHCl2F —or CHClF2 —based discharges was investigated as a function of plasma power density, pressure, and gas composition. For 0.56 W cm-2, 4 mTorr discharges the etch rates are in the range 125 Å min-1 (AlInAs) to 390 Å min-1 (InAs). These are comparable to the etch rates obtained with C2H6/H2 RIE under similar conditions. All of these materials exhibit smooth surface morphologies over a wide range of RIE parameters. Carrier compensation is observed to depths of ∼2000 Å in n‐type InP for high power density (1.3 W cm2) etching, but lower powers yield surfaces that display reasonable Schottky diode behavior for evaporated Au contacts. Thin (20–30 Å) residue layers containing 3–9 at. % Cl and 1–3 at. % F (24 at. % for AlInAs) are present after the dry etching, although this contamination can be removed by solvent cleaning. The formation of a high concentration of AlF3 on AlInAs provides a natural etch stop for removal of InGaAs layers in AlInAs/InGaAs heterojunction bipolar transistor structures. View full abstract»

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  • Susceptor and proximity rapid thermal annealing of carbon‐implanted InP

    Page(s): 1285 - 1290
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    AuGe contacts to n‐type layers formed by carbon implantation into semi‐insulating InP substrates demonstrate superior performance on material activated by annealing within an enclosed SiC‐coated graphite susceptor (700 °C, 10 s), compared to the more conventional proximity approach. This superiority is due to the better substrate surface morphology achieved. Activating the implants within the graphite susceptor eliminates P outdiffusion and formation of pits. In addition, annealing within the susceptor provides much better protection against edge degradation and slip formation. View full abstract»

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  • Photoresist etching in a hollow cathode reactor

    Page(s): 1291 - 1296
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    The submicron photoresist patterning capabilities of hollow cathode and asymmetric diode (‘‘reactive ion etch’’) reactors are compared here. Confined hollow cathodes etch more than 15 times faster than a diode at a given target voltage, at pressures of 2 Pa and below. Etch directionality has been studied using measurements of undercut in deep submicron patterns. Low‐pressure hollow cathode etch anisotropy is similar to that obtained in a diode reactor, at all target voltages. At high target voltages both reactor designs result in less than a few percent of total undercut and sidewall bowing using 0.7‐μm period, 3‐μm‐thick structures. This level of bowing is often seen in submicron etched apertures; we show how such bowing is affected by mask sidewall slope, and by the aspect ratio of etched structures. We review theories of sidewall bowing, concluding that electrostatic deflection and ion reflection from mask edges cause most of the sidewall bowing under our low‐pressure conditions. View full abstract»

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  • An edge‐defined technique for fabricating submicron metal–semiconductor field effect transistor gates

    Page(s): 1297 - 1299
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    A new technique has been developed to fabricate submicron gates in GaAs metal–semiconductor field effect transistors (MESFETs) using simple contact lithography. The technique employs a multiple layer resist structure and angle evaporation to define a conformal aluminum mask above the wafer surface. The gate length of the aluminum mask is well controlled by an evaporation angle and a resist thickness. The pattern transfer to the wafer surface is compatible with a recessed gate technology. In a production environment, the process is capable of producing quarter‐micron MESFETs with less than ±150 Å (1σ) gate length variation across a 2‐in. wafer. View full abstract»

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  • Improved resolution of an i‐line stepper using a phase‐shifting mask

    Page(s): 1300 - 1308
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    Improved resolution of an available i‐line (365 nm) stepper using a phase‐shifting mask is discussed. The resolution investigated here is not only for periodic lines but also for isolated spaces and hole patterns. To reduce the sizes of isolated space images for printing fine single spaces on a wafer, two additional line apertures with widths smaller than the critical dimension of the stepper lens are placed on each side of the main aperture of the mask. The optical phase of light passing through the main aperture and those through additional apertures are opposite. The additional apertures play a role in reducing the bright feature size to less than the line spread function of the lens. Similarly, printing a fine hole is accomplished by using a main aperture surrounded by four additional apertures. The intensity distribution on the wafer surface is simulated by comparing the images obtained with a phase‐shifting mask and those obtained with a conventional transmission mask. Printing fine patterns are performed using an i‐line stepper with a numerical aperture (NA) of 0.42. A pattern of 0.3 μm lines and spaces, 0.3 μm isolated spaces, and 0.4 μm hole patterns are resolved using the phase‐shifting mask. The process latitudes and the effects of variations in the optical phase of the additional apertures are also investigated. The image simulations and experimental results suggest that the phase‐shifting mask improve not only resolution but also exposure latitude and focus latitude. Furthermore, it is found that it is possible to control the position of the best focal plane by changing the optical phases of the additional apertures. View full abstract»

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  • Coherent point source electron beams

    Page(s): 1323 - 1324
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    The concept of a point source for electrons in view of quantum mechanical experiments is described. The engineering of such atomic electron emitters is discussed and recent experiments in holography with low energy electrons are presented. View full abstract»

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  • Soft x‐ray projection lithography

    Page(s): 1325 - 1328
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    Recent advances in x‐ray optics have made possible the practical consideration of soft x‐ray projection imaging for the fabrication of high density integrated circuits. View full abstract»

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  • Imaging surface atomic structure by means of Auger electrons

    Page(s): 1329 - 1334
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    It has recently been demonstrated that the surface atomic structure of single crystals, monolayers, and thin films can be imaged by means of Auger electrons. Angular distribution Auger microscopy (ADAM) produces subatomic resolution images of atomic structure by measuring and displaying the complete angular distribution of low‐energy Auger electrons emitted from atoms near the surface of a substrate or thin film. Auger angular distributions contain the silhouettes of surface atoms backlit by emission from atoms located deeper in the solid, revealing the relative positions of atoms near the surface. High‐energy Auger electrons have a larger escape depth and are therefore less surface sensitive but contain crystallographic information, particularly the locations of channels in the crystal. Consequently, ADAM is a powerful new technique for the characterization of semiconductor surfaces and epitaxial thin films, and also for fundamental studies of electron physics provided that certain important experimental criteria are met. Described here are recent applications of ADAM to probing the structures of single‐crystal surfaces and thin films. View full abstract»

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  • A novel electron‐beam exposure technique for 0.1‐μm T‐shaped gate fabrication

    Page(s): 1335 - 1338
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    This article reports on a novel fabrication technique for T‐shaped short gates using double‐layer electron‐beam(EB) resist system, which provides uniform gate length across 2‐in. wafers. In the proposed novel fabrication technique, a 1‐μm PMMA(I)/0.25‐μm PMMA(II) (HI/LOW MW) double‐layer resist system is adopted to fabricate T‐shaped gates. To avoid the influence of scattered electrons, the bottom PMMA(II) resist is EB‐exposed through the top opening with an acceleration of 50 or 25 kV and a single‐path line dose of 0.8–2.0 nC/cm. The top opening has been formed with a 25‐kV Gaussian electron beam at a 120 μC/cm2 dosage. The developed technique has accomplished T‐shaped gates with 70‐nm minimum footprint and 0.1–0.2‐μm T‐shaped gates, whose yield is over 80% on wafers. View full abstract»

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  • High aspect ratio asymmetric gate structures employed in novel self‐aligned high electron mobility transistor technology

    Page(s): 1339 - 1342
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    We report on the development and fabrication of high aspect ratio asymmetric gate structures defined by electron beam lithography. The asymmetric gate or ‘‘gamma’’ gate, as it is referred to, has substantially lower resistance compared to gates fabricated by more conventional techniques. The improved gate resistance is achieved by having an increased cross section (∼3×) over conventional T‐shaped gates, which is provided by the asymmetric fabrication scheme. Concurrently, the gamma gate has been incorporated into a self‐aligned high electron mobility transistor process, in which its asymmetric shape can be used to define the gate to source and gate to drain spacings independently. The unique tailoring capabilities of this fabrication technique, enables specific gate to source (Lgs), gate to drain (Lgd), and source to drain (Lsd) dimensions independent of the gate length (Lg). Devices fabricated using this technique, had an Lg of 0.10 μm, an Lgs of 0.20 μm, and an Lgd of 0.90 μm. The total Lsd self‐aligned dimension was 1.20 μm, with a resultant aspect ratio of 12:1 for a given Lg of 0.10 μm. View full abstract»

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  • All‐level electron‐beam lithography for trench isolated nano‐metal–oxide semiconductor devices

    Page(s): 1343 - 1347
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    An electron beam lithography based fabrication technology using highly anisotropic reactive ion etching (RIE) has been developed for the fabrication of exploratory 200 nm metal–oxide semiconductor field effect transistors (MOSFETs), designed to overcome scaling limitations below 0.5 μm. A Cambridge Instruments EBMF 10.5 vector scan system operated at 20 keV and field size of 1.6384 mm is employed. A pattern overlay accuracy of 75 nm (3σ) was obtained using 5×5×1.5 μm2 pit marks etched into the Si substrate. The fabrication process uses four resist systems: a polyimide/PECVD SiO2 based trilayer resist, P[MMA/MAA], the negative novalac resist SAL601‐ER7, and a newly developed positive novalac e‐beam resist SYSTEM‐9, which offers contrasts up to 13.9 and a moderate sensitivity of 29 μC/cm2. This integrated electron beam lithography for device fabrication at 0.2 μm and below, allows a throughput of 2–3 wafer/h writing 256 fields/wafer and a maximum data density (exposed area/total area) of 41%. View full abstract»

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Aims & Scope

The Journal of Vacuum Science and Technology B is devoted to reports of original research, review articles, and Critical Review articles.

Full Aims & Scope

Meet Our Editors

Editor
Gary E. McGuire
International Technology Center