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Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures

Issue 1 • Date Jan 1994

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Displaying Results 1 - 25 of 83
  • Issue Table of Contents

    Page(s): toc1
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    Freely Available from IEEE
  • Scanning tunneling microscopy morphological study of the first stages of growth of microwave chemical vapor deposited thin diamond films

    Page(s): 1 - 7
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    Thin diamond films have been grown by the microwave chemical vapor deposition method on polished silicon substrates using a methane concentration of 1.5% in hydrogen and deposition times between 7 and 60 min. The films were studied in air by scanning tunneling microscopy (STM). For short deposition times we have found small isolated diamond crystals (100 nm wide and 20 nm high), growing on the scratches produced by the initial polishing of the silicon surface, along with a smooth granular structure. As the deposition time increases to 15 min, the granular structure shows a slight faceting whereas the crystal size increases appreciably. This deposition period is characterized by a lower growth rate than that observed for longer times, which is explained as due to the presumably high nondiamond component of the granular structure. At 30 min a continuous film is formed with predominant {111} faces. The same trend is found for samples grown after 60 min. STM images show that {111} surfaces are rougher than {100} ones supporting the 2×1 reconstruction of the {100} surface during diamond growth. View full abstract»

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  • Fabrication of a nanoscale, in‐plane gated quantum wire by low energy ion exposure

    Page(s): 8 - 13
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    The fabrication of a nanoscale gated quantum wire in a GaAs modulation doped field effect transistor substrate is described. Both the wire conduction channel, with a 110 nm physical width, and the gates were patterned into the two‐dimensional electron gas of the substrate. This scheme produced in‐plane gated devices with 110 nm gate lengths and 75 nm separations between the active areas. Electron‐beam lithography was used to define masks for a subsequent flood exposure step with low energy argon ions (150 eV). This ion exposure technique produced very high gate‐to‐wire isolation, typically greater than 1014 Ω at 4.2 K. The in‐plane design employed here drastically reduces gate capacitance compared with metal top‐gate designs, and promises ultrafast switching times. These devices showed no short channel punch‐through effects, exhibited low gate leakage, and had sufficient gain to permit integration of several such devices into more complex circuits such as logic gates. View full abstract»

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  • Discretization of curved lines and arbitrary areas for ion and electron beam writing on a nonrectangular grid

    Page(s): 14 - 19
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    A method is presented to discretize almost arbitrary curves and areas on nonrectangular grids. This method can be applied in focused ion and electron beam systems. Distortion of the physical writing grid can be taken into account at the discretization, thus eliminating the need for a correction step afterwards. View full abstract»

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  • Fabrication of aspheric high numerical aperture reflective diffractive optic elements using electron beam lithography

    Page(s): 20 - 25
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    Electron beam lithography and reactive ion etching have been used to fabricate four level aspheric reflecting focusing diffractive optical elements. A fast (f/2), 1 mm diam, four‐phase‐level, reflecting, off‐axis imaging diffractive optical element, without spherical aberration, coma, and astigmatism, has been fabricated on silicon. Alignment and stitching errors have been held to less than 40 nm and the smallest pattern feature is 0.6 μm. The silicon grating is coated with gold to enhance reflectivity with an efficiency of 73%. The quality of diffractive optical elements is limited by the fidelity of the fabrication steps, and methods are demonstrated for proximity effect correction, alignment, high selectivity mask creation, and reactive ion etching that can be used for high quality diffractive optic element fabrication of essentially arbitrary type. View full abstract»

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  • Realization of limited‐area cathodes and their performance in an electron optical column

    Page(s): 26 - 31
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    Limited‐area cathodes based upon impregnated dispenser cathode material have been investigated in an electron optical column at accelerating voltages of up to 30 kV. A peak axial brightness of about 6×105 A/cm2 sr was obtained at this voltage using a flat cathode. Brightness values greater by a factor of 10 were measured using a conical limited‐area cathode with a tip radius of curvature of 0.075 mm. The latter measurements were affected by space–charge spreading in the beam. View full abstract»

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  • Thin film materials for the preparation of attenuating phase shift masks

    Page(s): 32 - 36
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    There is considerable interest in the use of phase shift masks as a route to extend the resolution, contrast, and depth‐of‐focus of lithographic tools beyond what is achievable with the normal chrome mask technology. In the attenuating phase shift mask, the chrome layer is replaced with a slightly transparent layer and the mask is etched so that light through the layer is 180° out of phase with light through clear regions. Thus, optical interference occurs which has the effect of increasing contrast at edges and of improving depth‐of‐focus. In this article, experiments of thin film materials designed to provide both the desired 180° phase shift and optical absorption in a single layer are described. View full abstract»

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  • New chemically amplified positive resist for electron beam lithography

    Page(s): 37 - 43
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    A novel chemically amplified positive resist with high sensitivity for electron beam (EB) direct‐writing lithography has been developed for deep submicron pattern fabrication. This positive EB resist consists of a tert‐butoxycarbonyl group‐protected poly (p‐vinylphenol) type matrix polymer installing cyano group and a metal‐free photoacid generator (PAG). The matrix polymer is insoluble in aqueous alkaline solutions. The acid‐catalyzed deprotection of matrix polymer results in poly (p‐vinylphenol), which can be easily dissolved in an aqueous alkaline solution. Three types of monomers, which can generate an acid by EB irradiation, are investigated as PAG in this resist system. Resist pattern profile is dependent on PAG characteristics, and the profile could be tapered in spite of the high contrast. It is found that ketosulfone‐type PAG is one of the most effective catalysts for this resist system. High resist sensitivity below 1.5 μC/cm2 at 20 keV is obtained after postexposure bake at 90 °C. Reverse tapered profile in a 0.5 μm thick resist can be achieved in a 0.2 μm line and space resist pattern by using a conventional alkaline developer. This new positive EB resist can be used to delineate 0.35 μm device patterns in a trilayer resist process. Furthermore, 0.2 and 0.3 μm line and space patterns in 0.5 and 1.0 μm film thickness, respectively, can also be fabricated below 2.0 μC/cm2 at 50 keV. View full abstract»

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  • Ag2Te/As2S3, a top‐surface, high‐contrast negative‐tone resist for deep ultraviolet submicron lithography

    Page(s): 44 - 47
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    The sensitivity of the Ag2Te/As2S3 system has been measured as a top‐surface imaging, negative‐tone resist between 632.8 and 193 nm. The sensitivity at g‐line (435.8 nm) and i‐line (365 nm) is of the order of 5 and 0.5 J/cm2, respectively, and is much too low to take advantage of the significant advantages of this resist. These advantages are high contrast (∼10), an edge effect which compensates for the reduction of optical intensity at line edges and latent image formation in a layer whose thickness is significantly less than the depth‐of‐focus of high resolution stepper optical systems. Measurements at 248 and 193 nm show significantly higher sensitivity of 350 and 80 mJ/cm2, respectively, suggesting that this system may possess practical potential at these wavelengths. Exposures on a GCA XLS‐7500 stepper with 0.42 NA at 365 nm have yielded 0.35 μm linewidths.   View full abstract»

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  • Polycrystalline silicon ‘‘slit nanowire’’ for possible quantum devices

    Page(s): 48 - 53
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    Polycrystalline silicon (poly‐Si) ‘‘slit nanowire’’ was fabricated in a slit formed with 100 nm lithography, microwave dry etching of silicon substrate, conformable filling of the trench by chemical vapor deposition (CVD) SiO2, slit etching of the CVD SiO2, conformable deposition of doped amorphous silicon, followed by etchback and annealing. Observation with transmission electron microscope confirmed that a poly‐Si slit nanowire, with a cross section of ∼5–8 nm×20 nm is fabricated. Appropriate annealing of the a‐Si layer makes the poly‐Si grains grow to more than 2 μm in length. This technique would make it possible to realize silicon quantum devices, and to fabricate conventional integrated circuit devices and light emitting slit nanowire devices on a same silicon chip, which would allow the fabrication of integrated optoelectronic circuits.   View full abstract»

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  • Shallow trench isolation for ultra‐large‐scale integrated devices

    Page(s): 54 - 58
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    A new process to form shallow trench isolation for ultra‐large‐scale integrated devices is presented. This technique utilizes chemical mechanical polish steps to provide a virtual planar surface at the end of processing for isolations of various size, ranging from 0.5 μm to several hundred μm. Superior uniformity has been obtained on wafers of 8 in. diam processed in a productionlike environment. Good device isolation also has been found. View full abstract»

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  • Three‐dimensional thermal analysis of high density triple‐level interconnection structures in very large scale integrated circuits

    Page(s): 59 - 62
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    A three‐dimensional thermal model of generic multilevel interconnection systems in very large scale integrated (VLSI) circuits is presented. The temperature distributions are quantitatively studied using the transmission‐line matrix modeling method. The temperature increase of a triple‐level parallel and crossing interconnection‐line scheme is found to be several times higher than that of a single‐level parallel line structure if the same magnitude of current density in the 106 A/cm2 range is maintained. More than 50% of the temperature rise occurs across the Si substrate; the treatment of which as a perfect heat sink in many previous thermal analyses of metallization structures is, therefore, inadequate. The large thermal gradients within the SiO2 insulators between different metallization levels can be eliminated and the temperature rise can be significantly reduced if the SiO2 interlevel and passivation dielectrics are replaced by a material with much higher thermal conductivity. Lower temperatures would be beneficial for improving electromigration lifetime and reducing thermal stress voiding in high density VLSI multilevel interconnections. View full abstract»

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  • Relationship between void formation and electromigration performance in Al/TiW multilayered interconnections

    Page(s): 63 - 68
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    The effects of the grain size in the Al layer and the passivation structure on the electromigration performance in the two level Al interconnections, the bottom (M1) and the top (M2) interconnections, each of which had a TiW/Al/TiW multilayered structure, were studied regarding void and extrusion formation in the Al layers. In M2, the resistance increase of the interconnection having a larger grain size in the Al layer formed with a reflow treatment, was smaller than that without any reflow treatment. Larger numbers of Al extrusions were, however, observed in the M2 interconnection with the reflow treatment than without it. In M1 which was buried under a thick insulation layer, enlargement of the Al grains by the reflow treatment was more effective to suppress the resistance increase than in the M2 interconnections. This result meant that the combination effect occurred when both treatments, enlargement of the Al grains in the interconnection and strengthening the passivation layer surrounding it, were applied simultaneously. View full abstract»

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  • Performance of the plasma deposited tungsten nitride barrier to prevent the interdiffusion of Al and Si

    Page(s): 69 - 72
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    It is proposed that the plasma enhanced chemical vapor deposited tungsten nitride (PECVD‐W–N) thin film is used as a diffusion barrier to prevent the interdiffusion between Al and Si during postannealing process. The atomic concentration of N in W–N film deposited with NH3/WF6 partial pressure ratio of 0.5 is about 33 at. % and its resistivity is 90–110 μΩ cm. The Rutherford backscattering spectrometry, Auger electron depth profiles, x‐ray diffraction, and scanning electron micrographs show that 900 Å PECVD‐W67N33 film interposed between Al and Si is more impermeable than PECVD‐W film due to N atoms and it also keeps its chemical integrity during the postfurnace annealing at 600 °C for 30 min in Ar ambient. View full abstract»

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  • Mechanism of ion beam induced deposition of gold

    Page(s): 73 - 77
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    Ion beam induced deposition is a novel method of thin film growth in which adsorbed, metal‐bearing molecules are decomposed by incident energetic ions thus leaving a deposit. In conjunction with finely focused ion beams this process is used in microelectronics for local repair, i.e., deposition of patches of metal film with better than 0.1 μm resolution. Each ion can decompose as many as 40–50 adsorbed molecules. The fundamental aspects of this process, namely how is the energy of the ion transferred to adsorbed molecules over a radius of up to 5 nm, have been studied. The decomposition yield (number of molecules decomposed/ion) was measured for Ne, Ar, Kr, and Xe ions at 50 and 100 keV. A model based on trim calculations was developed. The data correlate with this model confirming the view that collision cascades which can provide energy to surface atoms over a substantial area are responsible for ion beam induced deposition. View full abstract»

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  • Chemistry of silicon surfaces after wet chemical preparation: A thermodesorption spectroscopy study

    Page(s): 78 - 87
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    Ultraclean wet chemical preparation in air and a fast new load‐locking technique opens up a way to characterize real Si(111) surfaces after processing for microelectronic device fabrication with the proven surface‐analytical tools available in an ultrahigh vacuum. For the first time thermodesorption spectroscopy can be utilized, without interference from typical artefacts like contamination introduced by the ex situ preparation, to investigate the chemical termination and molecular composition of silicon surfaces after initial wet chemical key processes in semiconductor technology (chemical and UV/ozone‐enhanced cleaning, liquid and gaseous phase etching, rinsing with de‐ionized water). By multiplexing a mass spectrometer and analyzing thermally desorbed molecules over a wide range of masses simultaneously, we can separate quantitatively between the major surface‐terminating molecules that are inherently responsible for the different chemical surface properties (hydrophilic due to –OH groups after wet chemical or UV/ozone‐enhanced oxidation; hydrophobic due to termination with hydrides after etching with hydrofluoric acid/ammonium fluoride, HF/NH4F) and minor species characteristic for details of the preparation process (physisorbed residues upon omission of a final rinsing step; contributions from residual carbon–hydride contamination). Furthermore, distinct desorption channels of hydrogen molecules from mono‐, di‐, and trihydride surface states allow a characterization of the pH‐dependent etching by H2O:HF:NH4F [concentrated HF: selective removal of surface oxides; dilute HF: additional slow isotropic attack of bulk silicon; HF/NH4F: anisotropic attack by fast removal of higher hydride defect sites on Si(111)] and a determination of the resulting microroughness of the silicon surface. Slow regrowth of an ultrathin oxide on HF‐- - treated surfaces during final rinsing with water can be monitored by a separation between H2O desorption at high temperature from surface silanol groups and low‐temperature desorption of physisorbed water. View full abstract»

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  • Characterization of the Si/SiO2 interface morphology from quantum oscillations in Fowler–Nordheim tunneling currents

    Page(s): 88 - 95
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    As design rules shrink to conform with ultra‐large‐scale integration device dimensions, gate dielectrics for metal–oxide–semiconductor field effect transistor structures are required to be scaled to below ∼60 Å, where some properties of the device, such as interface roughness, that are negligible for thicker films become critical. Microroughness at the interface of ultrathin MOS capacitors has been shown to degrade these devices. The present study focuses on the interfacial region of ∼50 Å SiO2 on Si, using the quantum oscillations in Fowler–Nordheim tunneling currents as a probe. The oscillations are sensitive to the electron potential and abruptness of the film and interfaces. In particular, inelastic scattering of the electrons will reduce the amplitude of the oscillations. The amplitude of the oscillations is used to examine the degree of microroughness at the interface that results from a preoxidation high temperature anneal in an inert ambient containing various amounts of H2O. Atomic force microscopy imaging has shown correlations supporting a microroughness induced change in the quantum oscillation amplitudes. View full abstract»

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  • Sidewall passivation during the etching of poly‐Si in an electron cyclotron resonance plasma of HBr

    Page(s): 96 - 101
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    The etching of poly‐Si (n+ and undoped) in a radio‐frequency‐biased electron cyclotron resonance plasma of HBr was studied. Etch rates of Si, oxide, and photoresist were obtained by ellipsometry as a function of the bias voltage and two substrate temperatures (15 and 50 °C) at 5 mTorr pressure. The etch rate of poly‐Si depends on the doping level, with n+ Si etching faster than intrinsic Si. High selectivities of Si over both oxide and photoresist can be achieved at low bias voltages. Using angle‐resolved x‐ray photoelectron spectroscopy, it is shown that a carbon and bromine containing layer is deposited on the sidewall of the poly‐Si during the etching process when a photoresist patterned wafer is used. The thickness of the sidewall film decreases with increasing substrate temperature and increases at the bias voltage is raised. The thickness of this sidewall film influences the anisotropy of the process, with some undercutting occurring at high temperature and low bias voltage. View full abstract»

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  • Evaluation and control of device damage in high density plasma etching

    Page(s): 102 - 111
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    The effects of polysilicon etch plasma conditions on metal–oxide–semiconductor (MOS) capacitor breakdown and n‐channel MOS transistor (NMOS) performance have been investigated. A high density electron cyclotron resonance (ECR) plasma source with multipolar magnetic confinement was integrated into a full NMOS process flow. The polysilicon etch plasma process parameters for designed experiments were microwave power, overetch time, rf bias, and plasma radial uniformity. MOS capacitor leakage currents increase with longer polysilicon edge lengths on gate oxide, higher ion density, and higher ion energy during the polysilicon overetch step. Lower NMOS transistor transconductance and higher threshold voltages correlate with longer overetch times and high microwave power and rf bias during the overetch step. Device performance degradation increases with decreasing channel length, and the exposure of the source and drain oxide edges to a high density flux is thought to be the main cause for observed degradation. A high rate, selective, and low damage polysilicon etch process can be obtained using a high density (≳1011 cm-3) and moderate ion energy (≪30 eV) ECR discharge, with moderate power and zero applied rf bias during the overetch step. View full abstract»

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  • Advanced electron cyclotron resonance plasma etching technology for precise ultra‐large‐scale integration patterning

    Page(s): 112 - 115
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    Ultra‐large‐scale integration patterning with less than 0.25‐μm precision requires the optimization of electron cyclotron resonance (ECR) plasma discharge. This is because ion motion and etching results are affected by magnetohydrodynamic plasma instability and charge accumulation on the substrate in nonuniform plasma. Microloading and unusual notching at the boundary pattern between dense patterns and open spaces are both caused during n+ poly‐Si etching in nonuniform plasma. To prevent these problems, optimally uniform ECR plasma generation is necessary. This is accomplished by optimizing both the magnetic field profile and the introduction of microwaves. View full abstract»

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  • On the spatial resolution of two‐dimensional doping profiles as measured using secondary ion mass spectrometry tomography

    Page(s): 116 - 124
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    Knowledge of the lateral or spatial distribution of doping impurities is important for accurate process and device simulations of submicrometer silicon devices, since the edge effects of the electric fields can no longer be neglected. A newly developed technique, which utilizes the high sensitivity and high depth resolution of secondary ion mass spectrometry (SIMS), is capable of measuring two‐dimensional (2D, i.e., in the depth and the lateral direction) doping distributions. The technique is based on a series of one‐dimensional (1D) SIMS depth profiles obtained at different directions through a sample. The individual SIMS depth profiles are then recombined to generate a 2D doping profile using the expectation maximization algorithm, which was originally used in human body computer‐aided tomography. The SIMS tomography technique gives a doping distribution as a function of position. The positional accuracy or spatial resolution of the technique needs to be fully understood in order to properly use the technique. During a reconstruction process, the area of interest is divided into small volume elements or voxels, and the doping concentration for each voxel is estimated. Therefore, the size of the voxels determines the spatial resolution of the reconstructed profiles. The smaller the voxels are, the better the spatial resolution is. However, the size of the reconstructed area cannot be made infinitely small, due to the limited number of SIMS measurements. Since each SIMS measurement provides only one linear independent equation, the total number of equations (or the total number of the SIMS measurements) should be equal to the number of voxels (or unknowns). Thus, the size of the voxels, or equivalently, the number of SIMS measurements available imposes a practical limit on the spatial resolution. In addition, since the 1D SIMS depth profiles are used as the input for the profile reconstruction, the depth resolution of the 1D SIMS measurement- - s dictates the spatial resolution of the reconstructed profiles. Furthermore, the depth resolution of the 1D SIMS measurements is also affected by the sample skew, which is the measure of the lack of parallelism of the dopant line with respect to the beveled surface. And finally, the alignment of the 1D SIMS depth profiles relative to each other contributes to the positional uncertainty of the reconstructed distributions. A 20 keV boron implant through a 1.2 μm wide window into germanium preamorphized silicon has been reconstructed recently. The spatial resolution of the reconstructed dopant profile is evaluated to be 40 nm. It is found that the spatial resolution is predominantly determined by the depth resolution of 1D SIMS profiles, and the microtopography of the SIMS craters is the major cause of the poor depth resolution. It is expected that the spatial resolution of the 2D doping tomography can be greatly improved through the use of a simplified sample structure, which will reduce the SIMS profiling depth and provide better depth resolution for the 1D SIMS measurements. View full abstract»

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  • Roles of a Si insertion layer at GaAs/AlAs heterointerface determined by x‐ray photoemission spectroscopy

    Page(s): 125 - 129
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    Roles of an ultrathin Si insertion layer in AlAs/Si/GaAs system are studied by using in situ x‐ray photoemission spectroscopy. It is found that a main role of the Si layer is not a control of a valence band offset as was proposed by Sorba et al., but an introduction of band bending in an overgrown layer. The proposed band‐bending model explains all the experimental observations in the x‐ray photoemission spectra; an Al 2p line broadening and the dependence of a peak energy shift on the crystallographic orientation and an overgrown‐layer thickness. View full abstract»

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  • Plasma deposited SiO2 for planar self‐aligned gate metal–insulator–semiconductor field effect transistors on semi‐insulating InP

    Page(s): 130 - 133
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    Metal–insulator–semiconductor (MIS) field effect transistors were fabricated on InP substrates using a planar self‐aligned gate process. A 700–1000 Å gate insulator of SiO2 doped with phosphorus was deposited by a direct plasma enhanced chemical vapor deposition at 400 mTorr, 275 °C, 5 W, and power density of 8.5 mW/cm2. High frequency capacitance–voltage measurements were taken on MIS capacitors which have been subjected to a 700 °C anneal and an interface state density of 1×1011/eV cm2 was found. Current–voltage measurements of the capacitors show a breakdown voltage of 107 V/cm and a insulator resistivity of 1014 Ω cm. Transistors were fabricated on semi‐insulating InP using a standard planar self‐aligned gate process in which the gate insulator was subjected to an ion implantation activation anneal of 700 °C. MIS field effect transistors gave a maximum extrinsic transconductance of 23 mS/mm for a gate length of 3 μm. The drain current drift saturated at 87.5% of the initial current, while reaching to within 1% of the saturated value after only 1×103. This is the first reported viable planar InP self‐aligned gate transistor process reported to date. View full abstract»

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  • Room temperature photoluminescence from modulation doped AlGaAs/InGaAs/GaAs quantum wells

    Page(s): 134 - 141
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    The photoluminescence (PL) spectral shape and position from single, modulation doped, and undoped AlGaAs/InGaAs/GaAs quantum wells have been studied at room temperature (RT) with the purpose of evaluating the usefulness of the PL technique for verifying device material structures. Starting with a general expression for the line shape, we can qualitatively predict the spectral shape and position by evaluation of the squared overlap integrals of the four possible transitions between the two lowest states in the valence and conduction band wells. A self‐consistent calculation is used to determine the equilibrium wave functions and the energies of the bound states in the quantum well. Good agreement is found between the experimental and theoretical peak positions, and the Stark shift in the low‐energy spectral onset between doped and undoped structures also can be closely reproduced. The accuracy of the calculations has been verified by comparing structures with varying layer widths and constant In composition, and vice versa. We demonstrate that the doping‐induced electric field in the quantum well strongly affects the spectral shape of the PL signal. In fact, the dominant transition is typically from the first excited conduction band state to the valence band ground state. A sensitivity analysis restricted to the square of the overlap integrals and the peak wavelengths shows that changes in the quantum well parameters induced by changing the Ga and In fluxes can be separated for InGaAs mole fractions typically used in devices. This has also been verified by experiment. View full abstract»

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  • Comparison of surface recombination velocities in InGaP and AlGaAs mesa diodes

    Page(s): 142 - 146
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    The diode diameter dependence of current density in mesa p–n junctions was used to measure surface recombination velocities (S) for both InGaP and AlGaAs. For InGaP, S values of 4–5×104 cm s-1 were obtained for both wet‐ and dry‐etched mesas, and the surface was relatively insensitive to changes resulting from annealing or plasma exposure. Surface passivation by (NH4)2Sx treatment reduced the recombination velocity by a factor of 2. By contrast, AlGaAs displayed a strong sensitivity to the type of processing steps used in photonic and electronic device fabrication, with values of S as high as 9×105 cm s-1 after low temperature annealing, and as low as 3.7×104 cm s-1 after sulphide passivation. View full abstract»

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Aims & Scope

The Journal of Vacuum Science and Technology B is devoted to reports of original research, review articles, and Critical Review articles.

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Editor
Gary E. McGuire
International Technology Center