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Selected Topics in Signal Processing, IEEE Journal of

Issue 3 • Date June 2009

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Displaying Results 1 - 22 of 22
  • Table of contents

    Page(s): C1 - C4
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  • IEEE Journal of Selected Topics in Signal Processing publication information

    Page(s): C2
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  • Introduction to the Issue on DSP Techiques for RF/Analog Circuit Impairments

    Page(s): 345 - 347
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  • Digital Compensation of Cross-Modulation Distortion in Software-Defined Radios

    Page(s): 348 - 361
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1769 KB) |  | HTML iconHTML  

    The wideband RF receiver in a software-defined radio (SDR) system suffers from the nonlinear effects caused by the front-end analog processing. In the presence of strong blocker (interference) signals, such nonlinearities introduce severe cross modulation over the desired signals. This paper investigates how the cross-modulation distortion can be compensated for by using digital signal processing techniques. In the proposed solution, the SDR scans the wide spectrum and locates the desired signal and strong blocker signals. After down-converting these signals separately to the baseband, the baseband processor processes them jointly to mitigate the cross-modulation interferences. As a result, the sensitivity of the wideband RF receiver to the nonlinearity impairment can be significantly lowered, simplifying the RF and analog circuitry design in terms of implementation cost and power consumption. The proposed approach also demonstrates how mixed-signal, i.e., joint analog and digital, processing techniques play a critical role in the emerging SDR and cognitive radio technologies. View full abstract»

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  • Polyphase Nonlinear Equalization of Time-Interleaved Analog-to-Digital Converters

    Page(s): 362 - 373
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1289 KB) |  | HTML iconHTML  

    As the demand for higher data rates increases, commercial analog-to-digital converters (ADCs) are more commonly being implemented with multiple on-chip converters whose outputs are time-interleaved. The distortion generated by time-interleaved ADCs is now not only a function of the nonlinear behavior of the constituent circuitry, but also mismatches associated with interleaving multiple output streams. To mitigate distortion generated by time-interleaved ADCs, we have developed a polyphase NonLinear EQualizer (pNLEQ) which is capable of simultaneously mitigating distortion generated by both the on-chip circuitry and mismatches due to time interleaving. In this paper, we describe the pNLEQ architecture and present measurements of its performance. View full abstract»

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  • A Fast Digital Predistortion Algorithm for Radio-Frequency Power Amplifier Linearization With Loop Delay Compensation

    Page(s): 374 - 383
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1069 KB) |  | HTML iconHTML  

    An adaptive, digital, baseband predistortion (PD) algorithm that compensates for the memoryless nonlinearities of radio-frequency (RF) power amplifiers (PAs) for wireless systems using non-constant-envelop modulation schemes is presented. Compared with the conventional, complex-gain predistorters based on lookup tables (LUTs), the proposed direct-learning, multilevel lookup table (ML-LUT) approach assisted by a hardware-efficient loop delay compensation scheme achieves a significant reduction in convergence time and an improvement in linearization accuracy in the presence of an unknown loopback delay. The experimental results in an FPGA prototyping platform show that the fast adaptation speed enables the predistorter to track time-varying PA nonlinearities as fast as in the tens of kilohertz range, constituting a potential solution for highly efficient PAs in mobile handsets. View full abstract»

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  • A Polynomial-Based Time-Varying Filter Structure for the Compensation of Frequency-Response Mismatch Errors in Time-Interleaved ADCs

    Page(s): 384 - 396
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (539 KB) |  | HTML iconHTML  

    This paper introduces a structure for the compensation of frequency-response mismatch errors in M-channel time-interleaved analog-to-digital converters (ADCs). It makes use of a number of fixed digital filters, approximating differentiators of different orders, and a few variable multipliers that correspond to parameters in polynomial models of the channel frequency responses. Whenever the channel frequency responses change, which occurs from time to time in a practical time-interleaved ADC, it suffices to alter the values of these variable multipliers. In this way, expensive on-line filter design is avoided. The paper includes several design examples that illustrate the properties and capabilities of the proposed structure. View full abstract»

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  • Adaptive Predistortion With Direct Learning Based on Piecewise Linear Approximation of Amplifier Nonlinearity

    Page(s): 397 - 404
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (423 KB) |  | HTML iconHTML  

    We propose an efficient Wiener model for a power amplifier (PA) and develop a direct learning predistorter (PD) based on the model. The Wiener model is formed by a linear filter and a memoryless nonlinearity in which AM/AM and AM/PM characteristics are approximated as piecewise linear and piecewise constant functions, respectively. A two-step identification scheme, wherein the linear portion is estimated first and the nonlinear portion is then identified, is developed. The PD is modeled by a polynomial and its coefficients are directly updated using a recursive least squares (RLS) algorithm. To avoid implementing the inverse of the PA's linear portion, the cost function for the RLS algorithm is defined as the sum of differences between the output of the PA's linear portion and the inverse of the PA's nonlinear portion. The proposed direct learning scheme, which is referred to as the piecewise RLS (PWRLS) algorithm, is simpler to implement, yet exhibits comparable performance, as compared with existing direct learning schemes. View full abstract»

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  • Digital Compensation of Frequency-Dependent Joint Tx/Rx I/Q Imbalance in OFDM Systems Under High Mobility

    Page(s): 405 - 417
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (698 KB) |  | HTML iconHTML  

    Direct conversion orthogonal frequency division multiplexing (OFDM) systems suffer from transmit and receive analog processing impairments such as in-phase/quadrature (I/Q) imbalance causing inter-carrier interference (ICI) among sub-carriers. Another source of performance-limiting ICI in OFDM systems is Doppler spread due to mobility. However, the nature of ICI due to each of them is quite different. Unlike previous work which considered these two impairments separately, we develop a unified mathematical framework to characterize, estimate, and jointly mitigate ICI due to I/Q imbalance and high mobility. Based on our general model, we derive a closed-form expression for the degradation in signal-to-interference-plus-noise ratio (SINR) due to the impairments. Moreover, we exploit the special ICI structure to design efficient OFDM channel estimation and digital baseband compensation schemes for joint transmit/receive frequency-independent (FI) and frequency-dependent (FD) I/Q imbalances under high-mobility conditions. View full abstract»

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  • Error Vector Magnitude Optimization for OFDM Systems With a Deterministic Peak-to-Average Power Ratio Constraint

    Page(s): 418 - 429
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    Orthogonal frequency division multiplexing (OFDM) has been adopted by several wireless transmission standards. A major disadvantage of OFDM is the large dynamic range of its time-domain waveforms, making OFDM vulnerable to nonlinearities (including clipping effects) of the power amplifier (PA) and causing the PA to yield low efficiency on the RF to dc power conversion. A commonly used metric to characterize a signal's dynamic range is the peak-to-average power ratio (PAR). To suppress the nonlinear effects, one may want to reduce the signal PAR. However, this results in the increase of error vector magnitude (EVM), and may violate the spectral mask. In this paper, we formulate the problem as an EVM optimization task subject to a deterministic PAR constraint and a spectral mask constraint. A low-complexity customized interior-point algorithm is developed to solve the optimization problem. We also discuss extensions of the optimization framework, whereby we optimize the parameters with respect to two metrics on signal-to-noise-and-distortion ratio (SNDR) and mutual information, respectively. View full abstract»

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  • Trellis Shaping for Controlling Envelope of Single-Carrier High-Order QAM Signals

    Page(s): 430 - 437
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1097 KB) |  | HTML iconHTML  

    In this paper, trellis shaping (TS) is applied to dynamic range control of band-limited single-carrier high-order quadrature amplitude modulation (QAM) signals. With a newly designed shaping metric, we show that a signal with very low peak-to-average power ratio (PAR) can be achieved without significant loss of data rate. A specific example demonstrates that a band-limited transmission with spectral efficiency of 4.55 bit/s/Hz (including the redundancy due to the shaping) and PAR below 3 dB is achievable using a square 64-ary QAM constellation and a root raised-cosine filter with a roll-off factor 0.1. Furthermore, the proposed TS for high-order QAM can simultaneously reduce the average power and thus offers a shaping gain. The reduction of the PAR and average power can be flexibly controlled by adjusting a parameter associated with the shaping process. View full abstract»

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  • Estimation and Compensation of I/Q Imbalance in OFDM Direct-Conversion Receivers

    Page(s): 438 - 453
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (2198 KB) |  | HTML iconHTML  

    In this paper, we consider estimation and compensation of the I/Q imbalance generated by the direct-conversion receiver in orthogonal frequency division multiplexing (OFDM) systems. Two methods for I/Q imbalance compensation are proposed: the maximum-likelihood estimation (MLE)-based method and the least-square estimation (LSE)-based method. Computer simulations are conducted for comparisons of the performance. Effects of timing and frequency offsets on performance are also analyzed. The MLE-based method generally performs well even at low signal-to-noise ratio (SNR) and is robust against timing and frequency offsets. The LSE-based method outperforms the MLE-based method at higher SNR. Both methods are robust against different gain and phase imbalances. View full abstract»

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  • Digital Calibration of a Nonlinear S/H

    Page(s): 454 - 471
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (671 KB) |  | HTML iconHTML  

    Sample and hold (S/H) circuits exhibit a nonlinear behavior due to the input signal dependence of the sampling switch. In this paper, we develop a mixed signal model of this nonlinearity, where the need for a mixed signal description arises from the continuous-time input and sampled output of the S/H. The model is derived by employing a Volterra series expansion. Analysis of the model reveals that as the input signal passes through the S/H, its bandwidth expands, so the signal at the MOS switch output has a bandwidth two or three times larger than the input signal. Under the assumption that the signal at the MOS switch output is sampled above its Nyquist rate, a digital correction method is presented which relies on the theory of pth degree Volterra series inverses. An adaptive blind estimation technique working in tandem with the correction method is also derived for identifying the parameters characterizing the S/H nonlinearity. Numerical simulations are presented demonstrating that for oversampled input signals, the proposed digital calibration achieves a significant spurious free dynamic range (SFDR) improvement at a relatively modest computational cost. View full abstract»

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  • Smart Front-End Signal Processing for Advanced Wireless Receivers

    Page(s): 472 - 487
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1690 KB) |  | HTML iconHTML  

    One of the key trends in the design of radio receivers and other wireless devices is to shift more and more of the transceiver functionalities to digital signal processing (DSP). At the same time, the demands on the remaining analog circuits are greatly increased, especially with lower power supplies and nanoscale technology effects such as variability. With the terminal users requesting high radio performance and data rates, and low power consumption on one hand, and terminal flexibility and reduced implementation costs on the other hand, the requirements for these remaining analog front-end stages become extremely challenging to meet. As a result, one interesting idea is to complement analog radio-frequency (RF) circuits with smart signal-processing algorithms to digitally enhanced RF circuits. In this paper, we focus on developing and demonstrating novel signal-processing techniques intended for the analog and digital front-ends of future low-power, flexible radios. One key aspect in the work is power-efficient digital front-end design with great flexibility for digital selectivity filtering and sample rate alteration. Another key ingredient is the analysis and mitigation of different analog RF impairments, with special emphasis on I/Q imbalance effects and second-order intermodulation (IM2) distortion in wideband multicarrier or multichannel radio receivers. The approach used in this work generally draws from the practical system performance specifications. Overall, our results clearly indicate that the proposed compensation techniques can be used to suppress I/Q imbalance and IM2 distortion effects in receiver front-end sections under realistic signaling assumptions. The adaptivity and flexibility offered by the overall digital front-end design greatly reduces the power consumption of the radio. View full abstract»

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  • Calibration of Direct-Conversion Transceivers

    Page(s): 488 - 498
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (983 KB) |  | HTML iconHTML  

    Due to its architectural simplicity, the direct conversion scheme is attractive for low-cost, low-complexity and/or reconfigurable transceiver design. Unfortunately, this scheme comes with moderate performance due to its sensitivity to circuit impairments such as transmitter and receiver quadrature imbalance, carrier feedthrough and receiver dc-offset. In this paper, a calibration method is presented to estimate and compensate for these circuit impairments such that their distortions at the transmitter and receiver output are eliminated. The proposed method is noniterative and enables calibration during normal transmit operation. The calibration is directly applicable on most direct-conversion transceivers embedding two frequency synthesizers as the increase of complexity is concentrated in the digital domain only. The performance has been evaluated based on measurements of three different systems operating on frequencies corresponding to major wireless interface standards, namely WLAN, WiMAX, WiFi, DVB-T/H, and even 60-GHz multi-gigabit wireless. The calibration improved the system performance significantly, exceeding standard compliancy. View full abstract»

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  • Digital Compensation of Dynamic Acquisition Errors at the Front-End of High-Performance A/D Converters

    Page(s): 499 - 508
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    The track-and-hold stage at the front-end of high-speed, high-resolution ADCs is usually the limiting factor in their linearity performance at high input frequencies. In this paper, we propose a digital correction algorithm for the dynamic errors generated in this stage. The digital post-processing scheme uses circuit insight and judicious modeling of the relevant nonidealities to minimize complexity. We show that the number of coefficients required in our model is significantly smaller than the number of coefficients in the general form of the Volterra series. The coefficients are extracted in a foreground calibration approach using least square (LS) solutions on a set of input and output samples from training signals. Simulation results on a nonlinear track-and-hold circuit model show approximately 40 dB of improvement in linearity (SFDR) until the fourth Nyquist zone (at fs = 100 MHz). The method was also applied to a commercially available 14-bit, 155-MS/s ADC and showed to improve its SFDR to more than 83 dB up to an input frequency of 470 MHz in a lab experiment. View full abstract»

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  • Blind Calibration of Timing Skew in Time-Interleaved Analog-to-Digital Converters

    Page(s): 509 - 522
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    The performance of time-interleaved analog-to-digital converters is often significantly degraded by timing mismatch errors. We develop methods for performing blind calibration of such converters, i.e., for estimating the unknown time-skew parameters and for performing signal reconstruction from these estimates. The methods are low in complexity and allow for accurate calibration in systems with large numbers of converters, provided that the skews are sufficiently small in magnitude. We also present modifications to calibrate gain mismatch as well as adaptive sequential methods of implementation. Performance and complexity analysis is provided to support the viability of the methods. View full abstract»

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  • Multilevel LINC System Designs for Power Efficiency Enhancement of Transmitters

    Page(s): 523 - 532
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    To meet the linearity requirements of novel wireless communication standards using varying-envelope modulations, the class A power amplifier (PA) in the traditional transmitters must be highly backed off to work in the linear region where power efficiency drops rapidly. As for the PA linearization technique, linear amplifier with nonlinear components (LINC), achieves linear amplification without power backoff. However, the combiner power efficiency of the LINC system degrades significantly for signals with a high peak-to-average power ratio. In this paper, we propose a multilevel out-phasing (MOP) scheme to achieve high combiner efficiency by reducing the signal dynamics. Furthermore, based on the MOP, we design two architectures: envelope-adjusting MLINC (EA-MLINC) and gain-adjusting MLINC (GA-MLINC). Under the WCDMA system linearity requirements, the simulations show that 3-level EA-MLINC and 3-level GA-MLINC enhance the LINC system power-added efficiency from 16.5% to 33.4% and 23.6%, respectively. View full abstract»

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  • IEEE Journal of Selected Topics in Signal Processing Information for authors

    Page(s): 533 - 534
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  • Special issue on Processing Reverberant Speech Methodologies and Applications

    Page(s): 535
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  • IEEE International Symposium on Signal Processing and Information Technology

    Page(s): 536
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    Page(s): C3
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Aims & Scope

The Journal of Selected Topics in Signal Processing (J-STSP) solicits special issues on topics that cover the entire scope of the IEEE Signal Processing Society including the theory and application of filtering, coding, transmitting, estimating, detecting, analyzing, recognizing, synthesizing, recording, and reproducing signals by digital or analog devices or techniques.

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Editor-in-Chief
Fernando Pereira
Instituto Superior Técnico