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IEEE Transactions on Circuits and Systems I: Regular Papers

Issue 4 • Date April 2009

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  • Table of contents

    Publication Year: 2009, Page(s): C1
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  • IEEE Transactions on Circuits and Systems—I: Regular Papers publication information

    Publication Year: 2009, Page(s): C2
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  • A 5-GHz-Band CMOS Receiver With Low LO Self-Mixing Front End

    Publication Year: 2009, Page(s):705 - 713
    Cited by:  Papers (9)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (2414 KB) | HTML iconHTML

    A 5.0-GHz-band monolithic direct-conversion receiver front end employing subharmonic mixers (SHMs) is demonstrated in 0.18-mum CMOS technology. Instead of using transistors as transconductors, the SHMs adopt on-chip 1:4 transformers to achieve voltage gain, and hence, excellent local-oscillator self-mixing suppression and good linearity can be obtained. Additionally, a CMOS-compatible postprocess ... View full abstract»

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  • Hardware Reduction in Digital Delta-Sigma Modulators Via Error Masking - Part I: MASH DDSM

    Publication Year: 2009, Page(s):714 - 726
    Cited by:  Papers (10)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (3943 KB) | HTML iconHTML

    Two classes of techniques have been developed to whiten the quantization noise in digital delta-sigma modulators (DDSMs): deterministic and stochastic. In this two-part paper, a design methodology for reduced-complexity DDSMs is presented. The design methodology is based on error masking. Rules for selecting the word lengths of the stages in multistage architectures are presented. We show that the... View full abstract»

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  • Modeling, Quantitative Analysis, and Design of Switched-Current Pipeline A/D Converters

    Publication Year: 2009, Page(s):727 - 739
    Cited by:  Papers (7)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1100 KB) | HTML iconHTML

    Switched-current (SI) analog-to-digital converters (ADCs) are desirable for biomedical applications. Until now, SI ADCs are lacking effective and systematic computer-aided analysis and design (CAD) tools, particularly for noise. In this paper, models for different SI multiplying-digital-to-analog-converter (MDAC) designs are analytically derived, with the inclusion of distortion and noise. The mod... View full abstract»

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  • Frequency-Dependent Sampling Linearity

    Publication Year: 2009, Page(s):740 - 753
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1517 KB) | HTML iconHTML

    A novel model predicts tracking nonlinearity (NL) in the form of harmonic distortion (HD) for weakly nonlinear (i.e., SFDR > 30 dBc) first-order open-loop sampling circuits. The mechanisms for the NL are exponential settling, amplitude modulation, phase modulation, and discrete-time modulation. The model demonstrates that HD typically increases at 20 dB per decade over most standard oper... View full abstract»

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  • Verifying Functional Specifications by Regression Techniques on Lissajous Test Signatures

    Publication Year: 2009, Page(s):754 - 762
    Cited by:  Papers (12)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1868 KB) | HTML iconHTML

    In this paper, a low-cost method to verify functional specifications of analog VLSI circuits is proposed. The method is based on the analysis of Lissajous signatures combined with regression techniques. In order to obtain Lissajous signatures, the observation space is partitioned into zones using hyperplanes, and a set of integer values used as the digital signature of the circuit is generated by ... View full abstract»

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  • Wide-Range 5.0/3.3/1.8-V I/O Buffer Using 0.35-m 3.3-V CMOS Technology

    Publication Year: 2009, Page(s):763 - 772
    Cited by:  Papers (10)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (5086 KB) | HTML iconHTML

    A 5.0/3.3/1.8-V tolerant I/O buffer implemented using typical CMOS 2P4M 0.35-mum process is proposed in this paper. Unlike traditional mixed-voltage-tolerant I/O buffers, the proposed I/O buffer can transmit and receive signals with voltage levels of 5.0/3.3/1.8 V. By using a stacked PMOS and a stacked NMOS at the output stage and a dynamic gate bias generator providing appropriate control voltage... View full abstract»

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  • Intersignal Timing Skew Compensation of Parallel Links With Voltage-Mode Incremental Signaling

    Publication Year: 2009, Page(s):773 - 783
    Cited by:  Papers (6)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1098 KB) | HTML iconHTML

    Intersignal timing skew gives rise to reduced timing margins at receivers and limits the data rate of parallel links. This paper proposes a new intersignal timing-skew-compensation technique for parallel links with voltage-mode incremental signaling. The proposed technique employs an early/late block to detect the rising and falling edges of the pulses generated by intersignal timing skews at the ... View full abstract»

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  • Mixed-Radix Algorithm for the Computation of Forward and Inverse MDCTs

    Publication Year: 2009, Page(s):784 - 794
    Cited by:  Papers (11)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1120 KB) | HTML iconHTML

    The modified discrete cosine transform (MDCT) and inverse MDCT (IMDCT) are two of the most computationally intensive operations in MPEG audio coding standards. A new mixed-radix algorithm for efficiently computing the MDCT/IMDCT is presented. The proposed mixed-radix MDCT algorithm is composed of two recursive algorithms. The first algorithm, called the radix-2 decimation-in-frequency algorithm, i... View full abstract»

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  • A New Class of Reciprocal–Orthogonal Parametric Transforms

    Publication Year: 2009, Page(s):795 - 805
    Cited by:  Papers (12)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (542 KB) | HTML iconHTML

    In this paper, a new class of reciprocal-orthogonal parametric (ROP) transforms having 3N/2 independent parameters for a sequence length N that is a power of two is proposed. The basic idea behind the proposed transforms is to appropriately combine a new parametric kernel with that of the well-known Walsh-Hadamard transform that results in a square parametric matrix operator of order ... View full abstract»

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  • Invariant Measures of Tunable Chaotic Sources: Robustness Analysis and Efficient Estimation

    Publication Year: 2009, Page(s):806 - 819
    Cited by:  Papers (12)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1034 KB) | HTML iconHTML

    In this paper, a theoretical approach for studying the robustness of the chaotic statistics of piecewise affine maps with respect to parameter perturbations is discussed. The approach is oriented toward the study of the effects that the nonidealities derived from the circuit implementation of these chaotic systems have on their dynamics. The ergodic behavior of these systems is discussed in detail... View full abstract»

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  • Weak Signal Estimation in Chaotic Clutter Using Model-Based Coupled Synchronization

    Publication Year: 2009, Page(s):820 - 828
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (502 KB) | HTML iconHTML

    In this paper, detection and estimation of weak signals in chaotic clutter with unknown dynamics are presented. We achieve this in three steps. First, by using Takens' delay embedding theorem and support vector machines (SVMs), the dynamics of the clutter is modeled by training SVMs with a known data set. Second, we augment the model with coupled chaotic synchronization scheme so that a better est... View full abstract»

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  • Cluster Synchronization of Linearly Coupled Complex Networks Under Pinning Control

    Publication Year: 2009, Page(s):829 - 839
    Cited by:  Papers (168)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (659 KB) | HTML iconHTML

    In this paper, we focus on the problem of driving a general network to a selected cluster synchronization pattern by means of a pinning control strategy. Sufficient conditions are presented to guarantee the realization of the cluster synchronization pattern for all initial values. We also show the detailed steps on how to construct the coupling matrix and to modify the control strengths. Moreover,... View full abstract»

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  • Wavelet Transform Method for Coupled Map Lattices

    Publication Year: 2009, Page(s):840 - 845
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (805 KB) | HTML iconHTML

    The purpose of this paper is twofold. First, we derive a necessary and sufficient condition for local synchronization in coupled map lattices (CMLs) with symmetric coupling. In particular, we also identify the best choice of coupling strength in the sense that such a coupling strength gives the fastest convergence rate of initial values toward the synchronous manifold. Furthermore, such a coupling... View full abstract»

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  • Delay-Dependent H_{\infty } and Generalized H_{2} Filtering for Delayed Neural Networks

    Publication Year: 2009, Page(s):846 - 857
    Cited by:  Papers (51)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (498 KB) | HTML iconHTML

    This paper focuses on studying the H infin and generalized H 2 filtering problems for a class of delayed neural networks. The time-varying delay is only required to be continuous and bounded. Delay-dependent criteria are proposed such that the resulting filtering error system is globally exponentially stable with a guaranteed H infin or general... View full abstract»

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    Publication Year: 2009, Page(s): 858
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  • IEEE copyright form

    Publication Year: 2009, Page(s):859 - 860
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  • IEEE Circuits and Systems Society Information

    Publication Year: 2009, Page(s): C3
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  • IEEE Transactions on Circuits and Systems—I: Regular Papers Information for authors

    Publication Year: 2009, Page(s): C4
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Aims & Scope

The theory, analysis, design, and practical implementations of circuits, and the application of circuit techniques to systems and to signal processing.

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Meet Our Editors

Editor-in-Chief

Andreas Demosthenous
Dept. Electronic & Electrical Engineering
University College London
London WC1E 7JE, UK