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Electron Device Letters, IEEE

Issue 7 • Date July 1988

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Displaying Results 1 - 12 of 12
  • A novel trench-injector power device with low ON resistance and high switching speed

    Page(s): 321 - 323
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (309 KB)  

    A power MOSFET device structure that has been developed to optimize the tradeoff between ON resistance and switching speed is discussed. The device structure features a trench injector that injects a controlled quantity of minority carriers into the drift path of the MOSFET current to modulate the conductivity of the device during the ON state. The conductivity-modulated MOSFET device (CMDMOS) has been fabricated and characterized. The device structure has demonstrated low ON resistance and high switching speed. It can be implemented along with logic circuitry to allow programmable electrical control of the switching-speed/ON-resistance tradeoff.<> View full abstract»

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  • Electrical characteristics of MOSFETs using low-pressure chemical-vapor-deposited oxide

    Page(s): 324 - 327
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    The electrical characteristics of MOSFETs and MOS capacitors utilizing thin (80-230 AA) low-pressure chemical-vapor-deposited (LPCVD) oxide films deposited at 12 AA/min are presented. MOSFETs using CVD oxides show good electrical characteristics with 70-90% of the surface mobility of conventional MOSFETs. The CVD oxides exhibit the same low leakage current and high breakdown fields as the thermal oxides, and significantly lower trapping and trap generation rates than thermally grown oxides. Interface state densities of > View full abstract»

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  • High-performance InAlAs/InGaAs HEMTs and MESFETs

    Page(s): 328 - 330
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    The fabrication and microwave performance of heterostructure InAlAs/InGaAs HEMTs (high-electron-mobility transistors) and MESFETs are described. Maximum stable gains of 14.3 dB for a HEMT and 12 dB for a MESFET at 26.5 GHz have been achieved. These are believed to be record gains for FETs having gates as long as 0.7 mu m.<> View full abstract»

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  • A high-performance InGaAs/InAlAs double-heterojunction bipolar transistor with nonalloyed n/sup +/-InAs cap layer on InP(n) grown by molecular beam epitaxy

    Page(s): 331 - 333
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    An InGaAs/InAlAs double-heterojunction bipolar transistor (DHBT) on InP(n) grown by molecular-beam epitaxy (MBE) that exhibits high DC performance is discussed. An n/sup +/-InAs emitter cap layer was used for nonalloyed contacts in the structure and specific contact resistances of 1.8*10/sup -7/ and 6.0*10/sup -6/ Omega -cm/sup 2/ were measured for the nonalloyed emitter and base contacts, respectively. Since no high-temperature annealing is necessary, excellent contact surface morphology on thinner base devices can easily be obtained. In devices with 50*50- mu m/sup 2/ emitter area, common-emitter current gains as high as 1500 were achieved at a collector current density of 2.7*10/sup 3/ A/cm/sup 2/. The current gain increased up to 2000 for alloyed devices.<> View full abstract»

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  • In/sub 0.52/Al/sub 0.48/As/In/sub 0.53/Ga/sub 0.47/As double-heterojunction p-n-p bipolar transistors grown by molecular beam epitaxy

    Page(s): 334 - 336
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (253 KB)  

    P-n-p In/sub 0.52/Al/sub 0.48/As/In/sub 0.53/Ga/sub 0.47/As double-heterojunction bipolar transistors with a p/sup +/-InAs emitter cap layer grown by molecular-beam epitaxy have been realized and tested. A five-period 15-AA-thick In/sub 0.53/Ga/sub 0.47/As/InAs superlattice was incorporated between the In/sub 0.53/Ga/sub 0.47/As and InAs cap layer to smooth out the valence-band discontinuity. Specific contact resistance of 1*10/sup -5/ and 2*10/sup -6/ Omega -cm/sup 2/ were measured for nonalloyed emitter and base contacts, respectively. A maximum common emitter current gain of 70 has been measured for a 1500-AA-thick base transistor at a collector current density of 1.2*10/sup 3/ A/cm/sup 2/. Typical current gains of devices with 50*50- mu m/sup 2/ emitter areas were around 50 with ideality factors of 1.4.<> View full abstract»

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  • Integrated all-silicon color filtering element with an enhanced wavelength tunability

    Page(s): 337 - 339
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (263 KB)  

    A method for applying the wavelength-dependent response of silicon photodiodes for the integration of an electronically tunable optical filtering element with the photodetector in silicon is presented. Previous sensors suffered from a limited tunable spectral range. Here, the filter tunability is extended by enhancing the long-wavelength tunability using an extra implantation for realizing a higher doped buffer layer underneath a shallow junction to reduce the built-in depletion layer. Also, an independent electronically programmable short-wavelength cutoff is introduced. The latter is based on the control of the surface space-charge region. The flexibility obtained allows the electronic shaping of clearly distinguishable responses using a single photodiode.<> View full abstract»

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  • Channel-length measurement technique based on a floating-gate device

    Page(s): 340 - 342
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (248 KB)  

    By measuring the threshold voltage of the structure for several drawn channel lengths, Delta L is extracted. This technique is the translation of a capacitance measurement into a threshold measurement and as such is accurate and simple to perform. Since the technique does not involve a current flow through the transistor under test, it is especially advantageous for L/sub eff/ measurements on lightly-doped drain (LDD) and double-diffused drain (DDD) short-channel devices.<> View full abstract»

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  • Improved MOSFET short-channel device using germanium implantation

    Page(s): 343 - 346
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    Germanium doping in silicon tends to suppress any enhancement in dopant diffusion due to excess point defects. By performing a dual implantation of germanium and the normal source-drain dopant, lateral diffusion of the source-drain profile can be controlled, thus resulting in improved short-channel device behavior.<> View full abstract»

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  • A new implant-through-contact method for fabricating high-voltage TFTs

    Page(s): 347 - 349
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    A process to fabricate offset-gate thin-film transistors for high-voltage (i.e. >60-V) large-area applications is demonstrated. In contrast to the conventional method where an additional masking step is applied to mask the channel and the offset regions, the n/sup +/ source-drain implant is performed in the present process only after contact is open, and is therefore self-aligned to the contact. The offset-gate transistors are achieved by proper transistor layout where the contact-to-gate distance equals the designed n/sup +/-to-gate offset. In addition to saving one masking count as compared with the conventional method, the implant-through-contact method also features a self-aligned field-plant structure and smaller transistor layout area.<> View full abstract»

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  • Ohmic contacts to semiconducting diamond

    Page(s): 350 - 351
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    A solid-state reaction process for producing ohmic contacts to polished natural semiconducting diamond surfaces is discussed. The approach attempts to systematically characterize the processes which occur when metallic films of known thickness are deposited on a smooth diamond surface and annealed in the solid state under controlled conditions. Annealed tantalum/gold and titanium/gold deposits on View full abstract»

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  • DC and microwave characteristics of InAlAs/InGaAs single-quantum-well MODFETs with GaAs gate barriers

    Page(s): 352 - 354
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    The design and performance of In/sub 0.53/Ga/sub 0.47/As/In/sub 0.52/Al/sub 0.48/As modulation-doped field-effect transistors (MODFETs) have been optimized by incorporating a single In/sub 0.53/Ga/sub 0.47/As quantum-well channel and a thin strained GaAs gate barrier layer. These help to lower the output conductance and gate leakage current of the device, respectively. The DC performance of 1- mu m-gate devices is characterized by extrinsic transconductances of 320 mS/mm at 300 K and 450 mS/mm at 77 K and a best value of f/sub T/=35 GHz is derived from S-parameter measurements.<> View full abstract»

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  • Quantum-well p-channel AlGaAs/InGaAs/GaAs heterostructure insulated-gate field-effect transistors with very high transconductance

    Page(s): 355 - 357
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    Quantum-well p-channel pseudomorphic AlGaAs/InGaAs/GaAs heterostructure insulated-gate field-effect transistors with enhanced hole mobility are described. The devices exhibit room-temperature transconductance, transconductance parameter, and maximum drain current as high as 113 mS/mm, 305 mS/V/mm, and 94 mA/mm, respectively, in 0.8- mu m-gate devices. Transconductance, transconductance parameter, and maximum drain current as high as 175 mS/mm, 800 mS/V/mm, and 180 mA/mm, respectively were obtained in 1- mu m p-channel devices at 77 K. From the device data hole field-effect mobilities of 860 cm/sup 2//V-s at 300 K and 2815 cm/sup 2//V-s at 77 K have been deduced. The gate current causes the transconductance to drop (and even to change sign) at large voltage swings. Further improvement of the device characteristics may be obtained by minimizing the gate current. To this end, a type of device structure called the dipole heterostructure insulated-gate field-effect transistor is proposed.<> View full abstract»

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