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Power Electronics, IEEE Transactions on

Issue 1 • Date Jan. 2009

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Displaying Results 1 - 25 of 39
  • Table of contents

    Publication Year: 2009 , Page(s): C1
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    Freely Available from IEEE
  • IEEE Transactions on Power Electronics publication information

    Publication Year: 2009 , Page(s): C2
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  • Table of contents

    Publication Year: 2009 , Page(s): 1 - 2
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  • Editorial for the IEEE Transactions on Power Electronics, January 2009

    Publication Year: 2009 , Page(s): 3 - 5
    Cited by:  Papers (1)
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  • Seven-Level Shunt Active Power Filter for High-Power Drive Systems

    Publication Year: 2009 , Page(s): 6 - 13
    Cited by:  Papers (8)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (261 KB) |  | HTML iconHTML  

    In high-power adjustable-speed motor drives, such as those used in electric ship propulsion systems, active filters provide a viable solution to mitigating harmonic related issues caused by diode or thyristor rectifier front-ends. To handle the large compensation currents and provide better thermal management, two or more paralleled semiconductor switching devices can be used. In this paper, a novel topology is proposed where two active filter inverters are connected with tapped reactors to share the compensation currents. The proposed active filter topology can also produce seven voltage levels, which significantly reduces the switching current ripple and the size of passive components. Based on the joint redundant state selection strategy, a current balancing algorithm is proposed to keep the reactor magnetizing current to a minimum. It is shown through simulation that the proposed active filter can achieve high overall system performance. The system is also implemented on a real-time digital simulator to further verify its effectiveness. View full abstract»

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  • Multiple-Load–Source Integration in a Multilevel Modular Capacitor-Clamped DC–DC Converter Featuring Fault Tolerant Capability

    Publication Year: 2009 , Page(s): 14 - 24
    Cited by:  Papers (19)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (968 KB) |  | HTML iconHTML  

    A multilevel modular capacitor-clamped DC-DC converter (MMCCC) will be presented in this paper with some of its advantageous features. By virtue of the modular nature of the converter, it is possible to integrate multiple loads and sources with the converter at the same time. The modular construction of the MMCCC topology provides autotransformer-like taps in the circuit, and depending on the conversion ratio of the converter, it becomes possible to connect several dc sources and loads at these taps. The modularity of the new converter is not limited to only this dc transformer (auto) like operation, but also provides redundancy and fault bypass capability in the circuit. Using the modularity feature, some redundant modules can be operated in bypass state, and during some faults, these redundant modules can be used to replace a faulty module to maintain an uninterrupted operation. Moreover, by obtaining a flexible conversion ratio, the MMCCC converter can transfer power in both directions. Thus, this MMCCC topology could be a solution to establish a power management system among multiple sources and loads having different operating voltages. View full abstract»

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  • Fundamental Frequency Switching Strategies of a Seven-Level Hybrid Cascaded H-Bridge Multilevel Inverter

    Publication Year: 2009 , Page(s): 25 - 33
    Cited by:  Papers (70)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (692 KB) |  | HTML iconHTML  

    This paper presents a cascaded H-bridge multilevel inverter that can be implemented using only a single dc power source and capacitors. Standard cascaded multilevel inverters require n dc sources for 2n + 1 levels. Without requiring transformers, the scheme proposed here allows the use of a single dc power source (e.g., a battery or a fuel cell stack) with the remaining n-1 dc sources being capacitors, which is referred to as hybrid cascaded H-bridge multilevel inverter (HCMLI) in this paper. It is shown that the inverter can simultaneously maintain the dc voltage level of the capacitors and choose a fundamental frequency switching pattern to produce a nearly sinusoidal output. HCMLI using only a single dc source for each phase is promising for high-power motor drive applications as it significantly decreases the number of required dc power supplies, provides high-quality output power due to its high number of output levels, and results in high conversion efficiency and low thermal stress as it uses a fundamental frequency switching scheme. This paper mainly discusses control of seven-level HCMLI with fundamental frequency switching control and how its modulation index range can be extended using triplen harmonic compensation. View full abstract»

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  • Three-Phase Y-Rectifier Cyclic 2 Out of 3 DC Output Voltage Balancing Control Method

    Publication Year: 2009 , Page(s): 34 - 44
    Cited by:  Papers (6)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1132 KB) |  | HTML iconHTML  

    A three-phase Y-rectifier is formed by the star connection of single-phase unity-power-factor rectifier systems and represents a highly interesting concept for the realization of the input stage of high-power telecommunications power supply modules using established single-phase technology. However, for stable operation, control and balancing of the independent DC output voltages of the phase rectifier systems is required. A novel, easy-to-implement DC output voltage control concept is proposed in this paper. Here, the mean value of all three DC output voltages is controlled, and, in addition, always two out of the three DC voltages are compared and balanced. The basic operating principle of the control is described, the theoretical limit for the admissible asymmetric loading of the DC voltages is calculated, and numeric results for a 10-kW system are given. Finally, the theoretical considerations are verified by measurements on a 3 times1 kW Y-rectifier prototype. View full abstract»

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  • Control of a Cascade STATCOM With Star Configuration Under Unbalanced Conditions

    Publication Year: 2009 , Page(s): 45 - 58
    Cited by:  Papers (46)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1368 KB) |  | HTML iconHTML  

    A control scheme for star-connected cascade static synchronous compensators (STATCOMs) operating under unbalanced conditions is proposed. The STATCOM is assumed to be connected to an equivalent three-phase star-connected power supply. By selecting the line-to-neutral voltages of the equivalent power supply, zero average active power in each phase can be obtained under unbalanced compensation currents or unbalanced supply voltages. Furthermore, to implement a separate control for the three-phase dc-link voltages, the average active power in each phase can also be adjusted to a target value determined by the dc-link voltage control loop. Then, by forcing the converter neutral voltage to be equal to the counterpart of the equivalent power supply, the STATCOM can be decoupled into three single-phase systems and the line-to-neutral voltage of the equivalent power supply can be used as the input voltage to the corresponding phase leg. Accordingly, reference current tracking and dc-link voltage maintaining can be simultaneously achieved under unbalanced conditions. The valid operating range of the star-connected cascade STATCOM under unbalanced conditions is also analyzed. The proposed control scheme has been tested using the power systems computer-aided design/electromagnetic transient in dc system (EMTDC) simulation results and the experimental results based on a 30-kVAr cascade STATCOM laboratory prototype are proposed. View full abstract»

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  • Design and Control for a Charge-Regulated Flyback Switch-Mode Rectifier

    Publication Year: 2009 , Page(s): 59 - 74
    Cited by:  Papers (19)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1696 KB) |  | HTML iconHTML  

    This paper presents the design and control of a single-stage charge-regulated varying-frequency flyback switch-mode rectifier (SMR). First, the ratings of key constituted circuit components are derived, and accordingly, the power circuit is designed and implemented. Then, a novel charge-regulated, varying-frequency, current-controlled pulsewidth modulation (CCPWM) switching scheme is developed. In the proposed control scheme, the switch turn-on time is fixed, and the turn-off time interval is determined by the comparison result between the low-pass filtered switch current and its current command. The proposed switching scheme possesses the features of without slope compensation, having more dispersedly distributed harmonic spectrum, robust current tracking control, and ease of implementation using off-the-shelf integrated circuits. Finally, the quantitative and robust voltage regulation controls considering nonlinear behavior are made. Good dc output voltage regulation and ac input power quality control performances under wide load range are obtained. Some simulated and measured results are provided to demonstrate the performance of the developed SMR. View full abstract»

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  • Design Considerations for Maintaining DC-Side Voltage of Hybrid Active Power Filter With Injection Circuit

    Publication Year: 2009 , Page(s): 75 - 84
    Cited by:  Papers (17)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (756 KB) |  | HTML iconHTML  

    Hybrid active power filter with injection circuit (IHAPF) shows great promise in reducing harmonics and improving power factor with a relatively low capacity active power filter, but suffers from DC-side voltage instability that inadvertently impacts the compensation performance and safety of the IHAPF. In this paper, two new methods are proposed to overcome this major technical challenge with a hysteretic control and energy release circuit, and a controllable pulsewidth modulation (PWM) rectifier. Modeling, theoretical analysis, and experimental results have verified that both methods can stabilize DC-side voltage within a certain range. A prototype IHAPF system was built incorporating the PWM rectifier DC voltage control scheme, and installed in a 220 kV substation in Southern China. It demonstrated significant improvement in harmonics reduction and power factor. The DC voltage stability issue was also resolved with the new design. View full abstract»

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  • A Bridgeless PFC Boost Rectifier With Optimized Magnetic Utilization

    Publication Year: 2009 , Page(s): 85 - 93
    Cited by:  Papers (71)  |  Patents (3)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (739 KB) |  | HTML iconHTML  

    The implementation of a bridgeless power factor correction (PFC) boost rectifier with low common-mode noise is presented in this paper. The proposed implementation employs a unique multiple-winding, multicore inductor to increase the utilization of the magnetic material. The operation and performance of the circuit were verified on a 750-W, universal-line experimental prototype operating at 110 kHz. View full abstract»

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  • A Generic Open-Loop Algorithm for Three-Phase Grid Voltage/Current Synchronization With Particular Reference to Phase, Frequency, and Amplitude Estimation

    Publication Year: 2009 , Page(s): 94 - 107
    Cited by:  Papers (33)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (2292 KB) |  | HTML iconHTML  

    This paper presents a new open-loop architecture for three-phase grid synchronization based on moving average and predictive filters, where accurate measurements of phase, frequency, and amplitude are carried out in real time. Previous works establish that the fundamental positive sequence vector of a set of utility voltage/current vectors can be decoupled using Park's transformation and low-pass filters. However, the filtering process introduces delays that impair the system performance. More specifically, when the input signal frequency is shifted above the nominal, a nonzero average steady-state phase error appears in the measurements. To overcome such limitations, a suitable combination of predictive and moving average finite impulse response (FIR) filters is used by the authors to achieve a robust synchronization system for all input frequencies. Moving average filters are linear phase FIR filters that have a constant time delay at low frequencies, a characteristic that is exploited to good effect to design a predictive filter that compensates such time delays, enabling zero steady-state phase errors for shifted input frequencies. In summary, the main attributes of the new system are its good frequency adaptation, good filtering/transient response tradeoff, and the fact that its dynamics is independent of the input vector amplitude. Comprehensive experimental results validate the theoretical approach and the high performance of the proposed synchronization algorithm. View full abstract»

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  • High Step-Up Active-Clamp Converter With Input-Current Doubler and Output-Voltage Doubler for Fuel Cell Power Systems

    Publication Year: 2009 , Page(s): 108 - 115
    Cited by:  Papers (80)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (943 KB) |  | HTML iconHTML  

    A high-efficiency high step-up DC-DC converter is proposed for fuel cell power systems. The proposed system consists of an input-current doubler, an output-voltage doubler, and an active-clamp circuit. The input-current doubler and the output-voltage doubler provide a much higher voltage conversion ratio without using a high turns ratio in the transformer and increase the overall efficiency. A series-resonant circuit of the output-voltage doubler removes the reverse-recovery problem of the rectifying diodes. The active-clamp circuit clamps the surge voltage of switches and recycles the energy stored in the leakage inductance of the transformer. The operation principle of the converter is analyzed and verified. A 1 kW prototype is implemented to show the performance of the proposed converter. The prototype achieved a European efficiency of 96% at an input voltage of 30 V. View full abstract»

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  • A Systematic Approach to Synthesizing Multi-Input DC–DC Converters

    Publication Year: 2009 , Page(s): 116 - 127
    Cited by:  Papers (69)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (352 KB) |  | HTML iconHTML  

    The objective of this paper is to propose a general approach for developing multi-input converters (MICs). The derived MICs can deliver power from all of the input sources to the load either individually or simultaneously. By analyzing the topologies of the six basic pulsewidth modulation (PWM) converters, the method for synthesizing an MIC is inspired by adding an extra pulsating voltage or current source to a PWM converter with appropriate connection. As a result, the pulsating voltage source cells (PVSCs) and the pulsating current source cells (PCSCs) are proposed for deriving MICs. According to the presented synthesizing rules, two families of MICs, including quasi-MICs and duplicated MICs, are generated by introducing the PVSCs and the PCSCs into the six basic PWM converters. View full abstract»

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  • KY Converter and Its Derivatives

    Publication Year: 2009 , Page(s): 128 - 137
    Cited by:  Papers (28)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (584 KB) |  | HTML iconHTML  

    In this paper, a voltage-boosting converter, named KY converter (i.e., 1-plus-D converter), is presented. Unlike the traditional nonisolated boost converter, this converter possesses fast load transient responses, which is similar to the buck converter with synchronous rectification. In addition, it possesses nonpulsating output current, thereby not only decreasing the current stress on the output capacitor but also reducing the output voltage ripple. Besides, 1-plus-2D and 2-plus-D converters, derived from the KY converter, are presented based on the same structure but different pulsewidth-modulation control strategies. Above all, the main difference between the KY converter and its derivatives is that the latter ones possess higher output voltages than the former one under the same duty cycle. A detailed description of the KY converter and its derivatives is presented along with some simulated and experimental results. View full abstract»

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  • Design of Generalized Hysteresis Controllers for DC–DC Switching Power Converters

    Publication Year: 2009 , Page(s): 138 - 146
    Cited by:  Papers (13)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (811 KB) |  | HTML iconHTML  

    This paper proposes a novel uniform controller design approach for switching power converters. The procedure allows the deriving of both clock-driven and event-driven switching laws for controlling the stationary converter operation. A generic control scheme is introduced, which generalizes the concept of hysteresis control and executes a mode change, whenever the augmented state trajectory intersects with a switching plane in the state-time space. In contrast to previous approaches, the switching planes are systematically computed by means of results on periodic control systems. Consequently, desired loop properties such as orbital stability of a limit cycle and a fast transient response are guaranteed at least in a local neighborhood around a nominal set point. All results apply to a large class of switching converters and impose no restrictions on the number of energy storage devices or switches. View full abstract»

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  • Extended Ant Colony Optimization Algorithm for Power Electronic Circuit Design

    Publication Year: 2009 , Page(s): 147 - 162
    Cited by:  Papers (24)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1048 KB) |  | HTML iconHTML  

    Ant colony optimization (ACO) is typically used to search paths through graphs. The concept is based on simulating the behavior of ants in finding paths from the colony to food. Its searching mechanism is applicable for optimizing electric circuits with components, like resistors and capacitors, available in discrete values. However, power electronic circuits (PECs) generally consist of components, like inductors, manufactured in continuous values. Therefore, the traditional ACO algorithm cannot be applied directly. In this paper, an extended ACO (eACO) that can search the optimal values of components manufactured in discrete and continuous values is presented. The idea is based on using the orthogonal design method (ODM) to dynamically update the database of the components available with continuous values, so that these components will have pseudo-discrete values in the search space. To speed up the optimization process, the ODM performs local search of the best combination around the best ant. The eACO also takes the component tolerances into account in evaluating the fitness value of each ant. The proposed algorithm has been successfully used to optimize the design of a buck regulator. The predicted results have been compared with the published results available in the literature and verified with experimental measurements. View full abstract»

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  • Single-Loop Current Sensorless Control for Single-Phase Boost-Type SMR

    Publication Year: 2009 , Page(s): 163 - 171
    Cited by:  Papers (27)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (502 KB) |  | HTML iconHTML  

    In this paper, the first single-loop current sensorless control (SLCSC) in continuous current mode (CCM) for single-phase boost-type switching-mode rectifiers (SMRs) is developed and digitally implemented in a DSP-based system. Compared to the conventional multiloop control with one inner current loop and one outer voltage loop, there is only one voltage loop in the proposed SLCSC, where the voltage loop's output is used to shift the nominal duty ratio pattern generated from the sensed input and output voltages. Because of no current loop, the efforts of sampling and tracking inductor current can be saved. It implies that the proposed SLCSC is simple and very adaptable to the implementation with mixed-signal ICs. First, the effects of shifting nominal duty ratio pattern on the input current waveform are analyzed and modeled by considering the inductor resistance and conduction voltages. The result of analysis shows that the pure sinusoidal current can be inherently generated by the nominal duty ratio pattern where the current amplitude is roughly proportional to the controllable phase of nominal duty ratio pattern. Then, a voltage controller is included to regulate the DC output voltage by tuning this controllable phase. Finally, some simulated and experimental results have been given to demonstrate the performance of the proposed SLCSC. View full abstract»

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  • A New PWM Strategy to Reduce the Inverter Input Current Ripples

    Publication Year: 2009 , Page(s): 172 - 180
    Cited by:  Papers (24)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (720 KB) |  | HTML iconHTML  

    This paper deals with an innovating pulsewidth modulation (PWM) strategy allowing reduction of the DC input current ripples in classical operating area of adjustable-speed drives, and also maintaining a good quality of AC current waveforms and limited switching losses in the inverter. Thus, such a strategy is an interesting solution within embedded systems. Theoretical principles of the proposed method are introduced. Then, simulation results highlight the benefits of this algorithm compared to classical PWM control. Finally, a DSP-base implementation has been performed, and effectiveness of this strategy is confirmed by experiments for a starter-generator application. View full abstract»

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  • A Digital Two-Switching-Cycle Compensation Algorithm for Input-Voltage Transients in DC–DC Converters

    Publication Year: 2009 , Page(s): 181 - 191
    Cited by:  Papers (16)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1059 KB) |  | HTML iconHTML  

    In this paper, a new control algorithm is proposed to achieve excellent dynamic performance for DC-DC converters undergoing an input-voltage change. Using the concept of capacitor charge balance, the proposed algorithm predicts the two-switching-cycle duty ratio series to drive the converter back to steady state following an input-voltage transient. The equations needed to calculate the required duty cycle series are presented. By using the proposed algorithm, good transient performance, such as small output-voltage overshoot/undershoot and short recovery time, is achieved. Simulations and experiments are performed using a synchronous buck converter to verify the effectiveness of the proposed algorithm. Results show that the proposed method produces superior dynamic performance over that of a conventional current-mode PID controller. View full abstract»

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  • A New Hybrid Random PWM Scheme

    Publication Year: 2009 , Page(s): 192 - 200
    Cited by:  Papers (36)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (922 KB) |  | HTML iconHTML  

    This paper proposes a new hybrid random pulsewidth modulation (PWM) scheme based on a TMS320LF2407 DSP, in order to disperse the acoustic switching noise spectra of an induction motor drive. The proposed random PWM pulses are produced through the logical comparison of a pseudorandom binary sequence (PRBS) bits with the PWM pulses corresponding to two random triangular carriers. For this reason, the PWM pulses of the proposed scheme possess the hybrid characteristics of the random pulse position PWM and the random carrier frequency PWM. In order to verify the validity of the proposed method, the simulations and experiments were conducted with a 1.5-kW three-phase induction motor under the 2.5-A load condition. The DSP generates the random numbers, the PRBS bits with a lead-lag random bit (8 bit) and the three-phase reference signals. Also, a frequency modulator MAX038 makes the randomized frequency triangular carrier (3 plusmn 1 kHz). From the results, the proposed scheme shows good randomization effects of the voltage, current, and acoustic noise of the motor as compared with conventional scheme (3 kHz). View full abstract»

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  • Digital Hysteretic Voltage-Mode Control for DC–DC Converters Based on Asynchronous Sampling

    Publication Year: 2009 , Page(s): 201 - 211
    Cited by:  Papers (32)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1589 KB) |  | HTML iconHTML  

    This paper investigates a digital voltage-mode controller for dc-dc converters based on hysteresis modulation. The control structure implements a high-bandwidth hysteretic differentiator as its main building block, and realizes a nonconventional structure of PID compensation with performances comparable to analog hysteretic controls, thus breaking the bandwidth and dynamic limitations commonly encountered in typical digital control arrangements. The employment of an asynchronous A/D converter based on the threshold inverter quantization concept dramatically shrinks the average delay time that separates the sampling instant from the corrective control action. Moreover, the hysteretic nature of the derivative action results in an inherent nonlinear response to large signal load variations, which translates into fast control intervention and reduced settling times. The hysteretic differentiator employs a ring-oscillator-based modulator, which ensures resolution up to 390 ps without asking for a high-frequency clock. Both the 6-bit asynchronous A/D converter and the ring-oscillator-based modulator are designed and manufactured in the same IC using a standard 0.35 mum CMOS process. Analytical modeling, computer simulations, and experimental results on a synchronous buck converter confirm the validity of the approach and the dynamic performances achievable by the proposed control architecture. View full abstract»

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  • Current Share in Multiphase DC–DC Converters Using Digital Filtering Techniques

    Publication Year: 2009 , Page(s): 212 - 220
    Cited by:  Papers (18)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1018 KB) |  | HTML iconHTML  

    This paper introduces a new method of passive current balancing for digital control of multiphase DC-DC converters based upon the duty-cycle-matching principle. Current balance is achieved by inserting a digital filter into the control path. The method does not rely on a current balancing loop, and therefore, the stability and performance concerns associated with the traditional current balance loop are obviated. Being sensorless, it is insensitive to current measurement inaccuracies caused by noise, component value tolerance, or variation. It will be shown that effective current balancing can be achieved via some simple modifications to standard voltage-mode control laws, allowing current balancing to be achieved with minor additional complexity. The effectiveness of the method has been demonstrated by experimental validation of a multiphase DC-DC converter. The current share scheme has been shown to perform well dynamically, matching currents cycle by cycle during load steps, and clearly benefiting from the absence of the slow current share loop popular in traditional methods. The proposed current share filter blends well with existing digital controllers. Given the very low complexity in implementing the filter, the degree of matching achieved is exceptional. View full abstract»

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  • Loss-Free Balancing Circuit for Series Connection of Electrolytic Capacitors Using an Auxiliary Switch-Mode Power Supply

    Publication Year: 2009 , Page(s): 221 - 231
    Cited by:  Papers (6)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (938 KB) |  | HTML iconHTML  

    Most of today's power converters such as three-phase variable-speed drives, uninterruptible power systems, welding converters, and telecom and server power supplies are based on voltage-source converters equipped with bulky DC-link electrolytic capacitors. To be able to handle full DC bus voltage, the DC bus capacitor is arranged as series-connected electrolytic capacitors rated at lower voltage. An electrolytic capacitor, however, is not an ideal capacitor. It has significant leakage current that strongly depends on the capacitor temperature, voltage, and ageing conditions. To compensate large dispersion of the leakage current and ensure acceptable sharing of the total DC bus voltage among the series-connected capacitors, a passive balancing circuit is often used. Drawbacks of the ordinary passive balancing circuit, such as size, significant losses, and standby consumption are discussed in this paper. An active loss-free balancing circuit, which utilizes an auxiliary switch-mode power supply (SMPS) to equalize the capacitor voltages, is proposed. The capacitors midpoint (MP) is connected to the SMPS via two devices; namely a current injection device and a compensation device. The current injection device injects current into the capacitors MP, while the compensation device sinks the difference between the capacitor leakage currents and the injected current. As a result, the capacitor voltages are controlled and maintained in the desired ratio. The proposed balancing technique is theoretically analyzed and experimentally verified on a laboratory setup. The results are presented and discussed. View full abstract»

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Aims & Scope

IEEE Transactions on Power Electronics covers fundamental technologies used in the control and conversion of electric power.

Full Aims & Scope