# IEEE Transactions on Circuits and Systems II: Express Briefs

## Filter Results

Displaying Results 1 - 23 of 23

Publication Year: 2009, Page(s): C1
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• ### IEEE Transactions on Circuits and Systems—II: Express Briefs publication information

Publication Year: 2009, Page(s): C2
| PDF (38 KB)
• ### Construction of Lossless Ladder Networks With Simple Lumped Elements Connected Via Commensurate Transmission Lines

Publication Year: 2009, Page(s):1 - 5
Cited by:  Papers (2)
| | PDF (435 KB) | HTML

In this work, an algorithm to design lossless ladder networks with simple lumped elements connected via commensurate transmission lines is proposed. After giving the algorithm, a lumped-element low-pass Chebyshev filter was transformed to its mixed-element counterpart to illustrate the utilization of the algorithm. The filter, designed for a frequency band around 1 GHz, was fabricated and experime... View full abstract»

• ### A 5-Gbit/s Clock- and Data-Recovery Circuit With 1/8-Rate Linear Phase Detector in 0.18- ${rm mu}hbox{m}$ CMOS Technology

Publication Year: 2009, Page(s):6 - 10
Cited by:  Papers (20)
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With a new 1/8-rate linear phase detector (PD), a 5-Gbit/s clock and data recovery (CDR) circuit is implemented in a digital 0.18-mum CMOS technology. The outputs of the PD have much wider pulse than those of the conventional linear PDs. Thus, the design of circuits such as the PD and charge becomes much easier, and the maximum data rate is no longer limited by the speed of phase detection. The CD... View full abstract»

• ### CMOS Charge Pump With Transfer Blocking Technique for No Reversion Loss and Relaxed Clock Timing Restriction

Publication Year: 2009, Page(s):11 - 15
Cited by:  Papers (17)
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A CMOS charge pump based on a transfer blocking technique and a modified precharge scheme is proposed for avoiding reversion loss and relaxing the timing restrictions imposed on input clocks. Comparison results in an 80-nm CMOS process indicate that, with no loading current, the output voltage of the proposed charge pump reaches almost 98% of the ideal boosting level with switching ripple reduced ... View full abstract»

• ### A 1.2-MHz 10-bit Continuous-Time Sigma–Delta ADC Using a Time Encoding Quantizer

Publication Year: 2009, Page(s):16 - 20
Cited by:  Papers (13)
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This paper shows the operating principle and experimental results of a new continuous-time sigma-delta modulator architecture. The proposed modulator does not require a multibit quantizer nor a mismatch-shaping digital-to-analog converter to produce a multibit noise-shaped output. Instead, its quantizer encodes the loop filter output in a binary signal using a time encoding technique similar to pu... View full abstract»

• ### A Low-Power Programmable DLL-Based Clock Generator With Wide-Range Antiharmonic Lock

Publication Year: 2009, Page(s):21 - 25
Cited by:  Papers (9)
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A delay-locked-loop (DLL)-based clock generator for dynamic frequency scaling has been developed in a 0.13-mum CMOS technology. The proposed clock generator can generate a wide range of the multiplied clock signals ranging from 125 MHz to 2 GHz. In addition, owing to the proposed antiharmonic-lock block, the clock generator can change the frequency dynamically in one cycle time of the reference cl... View full abstract»

• ### Switching Schemes for Reducing Capacitor Mismatch Sensitivity of Quasi-Passive Cyclic DAC

Publication Year: 2009, Page(s):26 - 30
Cited by:  Papers (4)  |  Patents (1)
| | PDF (569 KB) | HTML

An alternately complementary switching is proposed to reduce the quasi-passive cyclic DAC error caused by capacitor mismatch, and a hybrid switching is adopted to further enhance its accuracy. With 1.1% moderate capacitor mismatch, the achievable effective number of bits is as high as 15. It is shown that a three-fold improvement in accuracy can be fulfilled by the proposed hybrid switching. Since... View full abstract»

• ### On the Computational Complexity of Tile Set Synthesis for DNA Self-Assembly

Publication Year: 2009, Page(s):31 - 35
Cited by:  Papers (5)
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DNA self-assembly has been advocated as a bottom-up manufacturing technology to supersede photolithography technology at nanometer scale. However, the issue of designing a DNA tile set for an arbitrary target pattern of finite size (as to ensure periodic repetition in its assembly) has not been fully addressed in the technical literature. This paper considers the synthesis of tile sets for DNA sel... View full abstract»

• ### Self-Biased Unity-Gain Buffers With Low Gain Error

Publication Year: 2009, Page(s):36 - 40
Cited by:  Papers (13)
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This paper describes self-biased unity-gain buffers that use cascaded, complementary source followers with feed forward and feedback to reduce input-output offset and gain error. Single-ended and differential buffers have been designed, fabricated and tested. View full abstract»

• ### Tunable Linear MOS Resistors Using Quasi-Floating-Gate Techniques

Publication Year: 2009, Page(s):41 - 45
Cited by:  Papers (12)
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A family of tunable MOS resistors based on quasi-floating-gate (QFG) transistors biased in the triode region is analyzed in this paper. From the study results, a new device that outperforms previous implementations, is presented. By means of a capacitive divider, the ac component of the drain-to-source voltage scaled with a factor alpha les 1 is added to the gate-to-source voltage leading to a can... View full abstract»

• ### A Generalization of a Fast RNS Conversion for a New 4-Modulus Base

Publication Year: 2009, Page(s):46 - 50
Cited by:  Papers (15)
| | PDF (199 KB) | HTML

A generalization of a new generic 4-modulus base for residue number systems (RNS) is presented in this paper. An efficient RNS to binary conversion algorithm and a hierarchical architecture for these bases are also described. The key features of our conversion architecture compared to previous published architectures of the same output range are a larger moduli set selection and savings on the cri... View full abstract»

• ### A VLSI Implementation of Barrel Distortion Correction for Wide-Angle Camera Images

Publication Year: 2009, Page(s):51 - 55
Cited by:  Papers (13)
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Wide-angle cameras are widely used in surveillance and medical imaging applications nowadays. Images captured by wide-angle lens suffer from barrel distortion which means that the outer regions of the image are compressed more than the inner one. A low-cost high-speed VLSI implementation for barrel distortion correction is presented in this brief. In our simulation, the proposed circuit can achiev... View full abstract»

• ### Highly Compact Interconnect Test Patterns for Crosstalk and Static Faults

Publication Year: 2009, Page(s):56 - 60
Cited by:  Papers (2)
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The effect of crosstalk-induced errors becomes more significant in high-performance circuits and systems. In this paper, compact crosstalk test patterns are introduced for a system-on-a-chip and board level interconnects considering physically effective aggressors. By being able to target multiple victim lines, 6n, where n is the number of nets patterns are drastically reduced to a c... View full abstract»

• ### Efficient CORDIC Algorithms and Architectures for Low Area and High Throughput Implementation

Publication Year: 2009, Page(s):61 - 65
Cited by:  Papers (30)  |  Patents (1)
| | PDF (225 KB) | HTML

This paper presents two area-efficient algorithms and their architectures based on CORDIC. While the first algorithm eliminates ROM and requires only low-complexity barrel shifters, the second eliminates barrel shifters completely. As a consequence, both the algorithms consume approximately 50% area in comparison with other CORDIC designs. Further, the proposed algorithms are applicable to the ent... View full abstract»

• ### Local Robustness of Hopf Bifurcation Stabilization

Publication Year: 2009, Page(s):66 - 70
Cited by:  Papers (1)
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Local robust analysis via L 2 gain method is presented for a class of Hopf bifurcation stabilizing controllers. In particular, we first construct a family of Lyapunov functions for the corresponding critical system, then derive a sufficient condition to compute the L 2 gain by solving the Hamilton-Jacobi-Bellman (HJB) inequalities. Local robust analysis can be c... View full abstract»

• ### Filtering for Networked Stochastic Time-Delay Systems With Sector Nonlinearity

Publication Year: 2009, Page(s):71 - 75
Cited by:  Papers (38)
| | PDF (156 KB) | HTML

This paper is concerned with the filtering problem for a class of discrete-time stochastic nonlinear networked control systems with network-induced incomplete measurements. The incomplete measurements include both the multiple random communication delays and random packet losses, which are modeled by a unified stochastic expression in terms of a set of indicator functions that is dependent on cert... View full abstract»

• ### Stabilization of Bilinear Systems Via Linear State-Feedback Control

Publication Year: 2009, Page(s):76 - 80
Cited by:  Papers (34)
| | PDF (268 KB) | HTML

This paper deals with the problem of stabilizing a bilinear system via linear state-feedback control. The proposed procedures enable us to compute a static state-feedback controller such that the zero-equilibrium point of the closed-loop system is asymptotically stable; moreover, it ensure that an assigned polytopic region is enclosed into the domain of attraction of the equilibrium point. The con... View full abstract»

• ### Bit-Level Extrinsic Information Exchange Method for Double-Binary Turbo Codes

Publication Year: 2009, Page(s):81 - 85
Cited by:  Papers (18)
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Nonbinary turbo codes have many advantages over single-binary turbo codes, but their decoder implementations require much more memory, particularly for storing symbolic extrinsic information to be exchanged between two soft-input-soft-output (SISO) decoders. To reduce the memory size required for double-binary turbo decoding, this paper presents a new method to convert symbolic extrinsic informati... View full abstract»

• ### Parallel Correction and Adaptation Engines for I/Q Mismatch Compensation

Publication Year: 2009, Page(s):86 - 90
Cited by:  Papers (6)  |  Patents (1)
| | PDF (418 KB) | HTML

We present a low-area implementation of an I/Q mismatch compensation (IQMC) circuit that comprises a correction engine and an adaptation engine. The correction engine performs I/Q mismatch compensation in the data path using a filter whose coefficients are updated after a programmable amount of time by a parallel adaptation engine that performs sample-by-sample off-line adaptation. This scheme all... View full abstract»

Publication Year: 2009, Page(s):91 - 92
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• ### IEEE Circuits and Systems Society Information

Publication Year: 2009, Page(s): C3
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• ### IEEE Transactions on Circuits and Systems—II: Express Briefs Information for authors

Publication Year: 2009, Page(s): C4
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## Aims & Scope

Part I will now contain regular papers focusing on all matters related to fundamental theory, applications, analog and digital signal processing. Part II will report on the latest significant results across all of these topic areas.

Full Aims & Scope

## Meet Our Editors

Editor-in-Chief

Chi K. Michael Tse
Dept. of Electronic and Information Engineering
Hong Kong Polytechnic University
Hunghom, Hong Kong
cktse@ieee.org