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Biomedical Circuits and Systems, IEEE Transactions on

Issue 3 • Date Sept. 2008

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Displaying Results 1 - 17 of 17
  • Table of contents

    Page(s): C1
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  • IEEE Transactions on Biomedical Circuits and Systems publication information

    Page(s): C2
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  • Editorial

    Page(s): 161
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  • Guest Editorial—Special Section for Selected Papers from ISCAS 2007

    Page(s): 162 - 163
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  • A Piezo-Powered Floating-Gate Sensor Array for Long-Term Fatigue Monitoring in Biomechanical Implants

    Page(s): 164 - 172
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (821 KB) |  | HTML iconHTML  

    Measurement of the cumulative loading statistics experienced by an implant is essential for prediction of long-term fatigue failure. However, the total power that can be harvested using typical in-vivo strain levels is less than 1 muW. In this paper, we present a novel method for long-term, battery-less fatigue monitoring by integrating piezoelectric transduction with hot-electron injection on a floating-gate transistor array. Measured results from a fabricated prototype in a 0.5-mum CMOS process demonstrate that the array can sense, compute, and store loading statistics for over 70000 stress-strain cycles which can be extended to beyond 107 cycles. The measured response also shows excellent agreement with a theoretical model and the nominal power dissipation of the array has been measured to be less than 800 nW. View full abstract»

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  • Low-Power Circuits for Brain–Machine Interfaces

    Page(s): 173 - 183
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    This paper presents work on ultra-low-power circuits for brain–machine interfaces with applications for paralysis prosthetics, stroke, Parkinson's disease, epilepsy, prosthetics for the blind, and experimental neuroscience systems. The circuits include a micropower neural amplifier with adaptive power biasing for use in multi-electrode arrays; an analog linear decoding and learning architecture for data compression; low-power radio-frequency (RF) impedance-modulation circuits for data telemetry that minimize power consumption of implanted systems in the body; a wireless link for efficient power transfer; mixed-signal system integration for efficiency, robustness, and programmability; and circuits for wireless stimulation of neurons with power-conserving sleep modes and awake modes. Experimental results from chips that have stimulated and recorded from neurons in the zebra finch brain and results from RF power-link, RF data-link, electrode-recording and electrode-stimulating systems are presented. Simulations of analog learning circuits that have successfully decoded prerecorded neural signals from a monkey brain are also presented. View full abstract»

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  • Active High Power Conversion Efficiency Rectifier With Built-In Dual-Mode Back Telemetry in Standard CMOS Technology

    Page(s): 184 - 192
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1474 KB) |  | HTML iconHTML  

    In this paper, we present an active rectifier with high power conversion efficiency (PCE) implemented in a 0.5- mum 5 V standard CMOS technology with two modes of built-in back telemetry; short- and open-circuit. As a rectifier, it ensures a PCE > 80%, taking advantage of active synchronous rectification technique in the frequency range of 0.125-1 MHz. The built-in complementary back telemetry feature can be utilized in implantable microelectronic devices (IMD), wireless sensors, and radio frequency identification (RFID) applications to reduce the silicon area, increase the data rate, and improve the reading range and robustness in load shift keying (LSK). View full abstract»

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  • A Low-Light CMOS Contact Imager With an Emission Filter for Biosensing Applications

    Page(s): 193 - 203
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (986 KB) |  | HTML iconHTML  

    In this paper, a fully functional low light 128 X 128 contact image sensor for cell detection in biosensing applications is presented. The imager, fabricated in 0.18 mum CMOS technology, provides low-noise operation by employing both a modified version of the active reset (AR) technique and a modified version of the active column sensor (ACS) readout method. High-sensitivity, low noise performance of the presented sensor is well-suited for fluorescence imaging. For this purpose, an emission filter was fabricated and integrated with the sensor. The filter was fabricated using PDMS and Sudan II Blue dye mix, spin-coated and deposited in a class 1000 clean room. The designed filter is suitable for excitation at wavelengths below 340 nm and emission at 450 nm and above. The fabricated imager architecture and operation are described, noise analysis is presented and measurements from a test chip are shown. Experimental results using live neurons from the pond snail, Lymnaea stagnalis, and fluorescence polystyrene micro-beads prove the functionality of the fabricated system and indicate its biocompatiblity. View full abstract»

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  • Development of a Time Domain Fluorimeter for Fluorescent Lifetime Multiplexing Analysis

    Page(s): 204 - 211
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    We show that a portable, inexpensive USB-powered time domain fluorimeter (TDF) and analysis scheme were developed for use in evaluating a new class of fluorescent lifetime multiplexed dyes. Fluorescent proteins, organic dyes, and quantum dots allow the labeling of more and more individual features within biological systems, but the wide absorption and emission spectra of these fluorophores limit the number of distinct processes which may be simultaneously imaged using spectral separation alone. By additionally separating reporters in a second dimension, fluorescent lifetime multiplexing provides a means to multiply the number of available imaging channels. View full abstract»

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  • A Silicon Central Pattern Generator Controls Locomotion in Vivo

    Page(s): 212 - 222
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1165 KB) |  | HTML iconHTML  

    We present a neuromorphic silicon chip that emulates the activity of the biological spinal central pattern generator (CPG) and creates locomotor patterns to support walking. The chip implements ten integrate-and-fire silicon neurons and 190 programmable digital-to-analog converters that act as synapses. This architecture allows for each neuron to make synaptic connections to any of the other neurons as well as to any of eight external input signals and one tonic bias input. The chip's functionality is confirmed by a series of experiments in which it controls the motor output of a paralyzed animal in real-time and enables it to walk along a three-meter platform. The walking is controlled under closed-loop conditions with the aide of sensory feedback that is recorded from the animal's legs and fed into the silicon CPG. Although we and others have previously described biomimetic silicon locomotor control systems for robots, this is the first demonstration of a neuromorphic device that can replace some functions of the central nervous system in vivo. View full abstract»

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  • A 1.2-V 140-nW 10-bit Sigma–Delta Modulator for Electroencephalogram Applications

    Page(s): 223 - 230
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    This paper presents a second-order Sigma-Delta modulator for electroencephalogram applications with 10 bits of resolution, 1.2 V of supply voltage, and only 140 nW of power consumption over a bandwidth of 25 Hz. Low-voltage operation has been achieved using quasi-floating-gate-based circuits. The use of a new class-AB operational amplifier in weak inversion allows very low power consumption. Experimental results show an energy efficiency of 1.6 pJ per quantization level, making it the most energy-efficient converter reported to date in the very low signal bandwidth range. View full abstract»

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  • An Integrated Implantable Stimulator That is Fail-Safe Without Off-Chip Blocking-Capacitors

    Page(s): 231 - 244
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1539 KB) |  | HTML iconHTML  

    We present a neural stimulator chip with an output stage (electrode driving circuit) that is fail-safe under single-fault conditions without the need for off-chip blocking-capacitors. To miniaturize the stimulator output stage two novel techniques are introduced. The first technique is a new current generator circuit reducing to a single step the translation of the digital input bits into the stimulus current, thus minimizing silicon area and power consumption compared to previous works. The current generator uses voltage-controlled resistors implemented by MOS transistors in the deep triode region. The second technique is a new stimulator output stage circuit with blocking-capacitor safety protection using a high-frequency current-switching (HFCS) technique. Unlike conventional stimulator output stage circuits for implantable functional electrical stimulation (FES) systems which require blocking-capacitors in the microfarad range, our proposed approach allows capacitance reduction to the picofarad range, thus the blocking-capacitors can be integrated on-chip. The prototype four-channel neural stimulator chip was fabricated in XFAB's 1-mum silicon-on-insulator CMOS technology and can operate from a power supply between 5-18 V. The stimulus current is generated by active charging and passive discharging. We obtained recordings of action potentials and a strength-duration curve from the sciatic nerve of a frog with the stimulator chip which demonstrate the HFCS technique. The average power consumption for a typical 1-mA 20-Hz single-channel stimulation using a book electrode, is 200 muW from a 6 V power supply. The silicon area occupation is 0.38 mm2 per channel. View full abstract»

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  • IEEE copyright form

    Page(s): 245 - 246
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  • ISCAS 2009

    Page(s): 247
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  • IEEE Transactions on Biomedical Circuits and Systems information for authors

    Page(s): 248
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  • IEEE Transactions on Biomedical Circuits and Systems society information

    Page(s): C3
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  • Blank page [back cover]

    Page(s): C4
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Aims & Scope

IEEE Transactions on Biomedical Circuits and Systems (TBioCAS) publishes peer-reviewed manuscripts reporting original and transformative research at the intersection between the life sciences and circuits and systems engineering principles.

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Meet Our Editors

Editor-in-Chief
Gert Cauwenberghs
University of California at San Diego