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Computers and Digital Techniques, IEE Proceedings E

Issue 2 • Date March 1980

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Displaying Results 1 - 7 of 7
  • Low-level-device programming with a high-level language

    Publication Year: 1980 , Page(s): 37 - 44
    Save to Project icon | Click to expandAbstract | PDF file iconPDF (979 KB)  

    This tutorial paper describes how device hardware may be programmed directly from a Pascal-like high-level language. The familiar data types of Pascal are extended to include information which specifies a mapping onto device hardware, and concurrent programming constructs are introduced as a natural environment for low-level I/O programming. Examples of interrupt-driven I/O are presented, and exis... View full abstract»

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  • Aids - an integrated design system for digital hardware

    Publication Year: 1980 , Page(s): 45 - 54
    Cited by:  Papers (1)
    Save to Project icon | Click to expandAbstract | PDF file iconPDF (1356 KB)  

    A computer-aided-design system is described which is aimed at the expression, analysis, implementation and realisation of any type of computer system, but is of most value in those systems exhibiting parallelism. A formal model has been specially developed with parallel systems in mind. The model uses a directed-graph representation which is suited to the illustration of hardware algorithms. To en... View full abstract»

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  • Formal description of computational structure in aids

    Publication Year: 1980 , Page(s): 55 - 63
    Save to Project icon | Click to expandAbstract | PDF file iconPDF (1179 KB)  

    This paper discusses level 1 of the `Aids¿¿ computer-aided digital design system. At this, the architecture level, the designer maps out his basic structure of control and data flow using a formal directedgraph model of computations. By expressing his ideas in a special-purpose language, called G, he is able to submit the design to certain analysis tools. View full abstract»

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  • Cascade networks of logic functions built in multiplexer units

    Publication Year: 1980 , Page(s): 64 - 68
    Cited by:  Papers (1)
    Save to Project icon | Click to expandAbstract | PDF file iconPDF (427 KB)  

    Abstract: A graphical method is presented for implementing logic functions by means of a cascade of 2n-input multiplexers. The method is particularly easy to use for functions of up to four variables, but is valid for any function that can be represented on a Karnaugh map, i.e. with up to six variables. Examples are given showing its use with completely and incompletely defined functions. View full abstract»

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  • Testing for numerical computations

    Publication Year: 1980 , Page(s): 69 - 76
    Cited by:  Papers (2)
    Save to Project icon | Click to expandAbstract | PDF file iconPDF (710 KB)  

    We consider the problem of error detection in programs or specialised devices computing real functions f(x), where the argument x is represented in binary form. For error detection we use the linear check inequalities |¿¿¿¿¿¿T f(x ¿¿ ¿¿) ¿¿ C| ¿¿ ¿¿, where ¿¿ ¿¿ 0 is some given small constant, ¿¿denotes componentwise addition mod 2 of binary vectors, T is some set of binary vectors and C is a cons... View full abstract»

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  • 5th European solid-state circuits conference

    Publication Year: 1980 , Page(s): 77 - 78
    Save to Project icon | PDF file iconPDF (326 KB)  
    Freely Available from IEEE
  • 7th symposium on operating systems principles

    Publication Year: 1980
    Save to Project icon | PDF file iconPDF (163 KB)  
    Freely Available from IEEE