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Electronic Circuits and Systems, IEE Proceedings G

Issue 5 • Date October 1987

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Displaying Results 1 - 9 of 9
  • Probability machines and shift-register sequence segmentation

    Publication Year: 1987 , Page(s): 209 - 215
    Save to Project icon | Click to expandAbstract | PDF file iconPDF (767 KB)  

    A basic multiprocessor probability machine is described. If a shift register is used to generate random numbers for such a machine, it becomes necessary to be able to find the state of the shift register at points part way along the available number sequence. Methods are described for accomplishing this segmentation. View full abstract»

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  • Erratum: Implementation of the discrete Fourier transform on 2-dimensional systolic processors

    Publication Year: 1987
    Save to Project icon | PDF file iconPDF (74 KB)  
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  • Efficient bit-level systolic array for the linear discriminant function classifier

    Publication Year: 1987 , Page(s): 216 - 224
    Cited by:  Papers (2)
    Save to Project icon | Click to expandAbstract | PDF file iconPDF (1152 KB)  

    The linear discriminant function classifier is a widely used but computationally demanding method in statistical pattern recognition. This paper describes a bit-level systolic array for the linear discriminant function classifier to improve its processing speed. The system includes a new scheme for inner product computation, which not only has 100% efficiency but also gains a speed improvement ove... View full abstract»

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  • Generalised maximally flat approximation

    Publication Year: 1987 , Page(s): 225 - 228
    Save to Project icon | Click to expandAbstract | PDF file iconPDF (511 KB)  

    An analytical method to generalise the classical Butterworth approximation into a maximally flat approximation function possessing finite and asymmetric transmission zeros is presented. The passband of this general function is no longer restricted to the usual ¿ 3 dB at ±1 rad/s coordinates, and therefore extremely asymmetric characteristics can be generated, such as those required by pseudohigh... View full abstract»

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  • Large-signal frequency responses of 2nd-order filters containing multiple amplifiers

    Publication Year: 1987 , Page(s): 229 - 235
    Cited by:  Papers (1)
    Save to Project icon | Click to expandAbstract | PDF file iconPDF (684 KB)  

    The describing-function technique is extended to predict the large-signal performance of active filters containing any number of operational amplifiers. This is achieved by generalising the theory of active filters whose amplifiers are each represented by a dominant pole and a saturation nonlinearity. As examples, the jump-resonance amplitude and phase characteristics of several popular 3-amplifie... View full abstract»

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  • Novel floating negative immittance convertor

    Publication Year: 1987 , Page(s): 236 - 238
    Save to Project icon | Click to expandAbstract | PDF file iconPDF (334 KB)  

    A network realisation for a floating negative immittance convertor (FNIC) using second generation current conveyor (CCII) elements has been proposed. The novelties of the scheme are no design constraints involving matched components, use of only the nominal termination component with ideal CCII devices. Even with nonideal but matched devices, a true FNIC realisation does not require any additional... View full abstract»

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  • Phase detector performance in the presence of harmonic distortion

    Publication Year: 1987 , Page(s): 239 - 242
    Save to Project icon | Click to expandAbstract | PDF file iconPDF (358 KB)  

    The influence of harmonic distortion on phase errors is investigated. Linear (saw-tooth), triangular and sinusoidal phase detectors are examined. It is shown that these errors are directly related to the harmonic distortion factors of the input signals. The errors are computed for each phase detector. View full abstract»

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  • Delay estimate in a capacitively loaded URC line

    Publication Year: 1987 , Page(s): 243 - 245
    Save to Project icon | Click to expandAbstract | PDF file iconPDF (257 KB)  

    An approximated solution for the delay time of an open-ended uniformly distributed RC (URC) line has been developed. An estimate of the delay time for a capacitively loaded URC line has been derived. The results obtained may be useful for delay simulation in VLSI interconnections. View full abstract»

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  • Simple sufficient test for stability of 2-dimensional recursive digital filters

    Publication Year: 1987 , Page(s): 246 - 247
    Save to Project icon | PDF file iconPDF (159 KB)  
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