By Topic

Electronic Circuits and Systems, IEE Proceedings G

Issue 6 • Date December 1983

Filter Results

Displaying Results 1 - 9 of 9
  • Digital signal processing schemes for efficient interpolation and decimation

    Page(s): 225 - 235
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (1115 KB)  

    In this paper a new structure for sampling rate alteration is presented in which efficiency is achieved by performing all necessary processing at the low sampling rate. Moreover the repeated use of a single processing block makes this structure highly modular and eminently suitable for LSI/VLSI implementation. Particular emphasis is placed on decimating and interpolating by a factor of two. The proposed structures offer very desirable properties in addition to the above and, in particular, in relation to their insensitivity with respect to reduced wordlength performance. Sampling-rate alteration by factors other than two is also examined and design procedures are given. The paper contains extensive tables and graphs to facilitate the design of these structures by estimating the required order and parameters for the given requirements before attempting any optimisation. In the case of interpolating by a factor two an analytic equiripple solution is given. The paper includes some design examples with performance evaluation under different wordlengths. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Practical-BIBO stability of n-dimensional discrete systems

    Page(s): 236 - 242
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (962 KB)  

    It is shown that the conventional definition of BIBO stability for n-dimensional discrete systems is unnecessarily restrictive for most practical applications. The conventional definition permits the input signal to be unbounded in all n dimensions; however, in most practical applications the input signal is unbounded in, at most, one dimension. Based on this, a new definition of practical-BIBO stability is introduced which is less restrictive, and more relevant for practical applications than the conventional one. It is shown that the voltage transfer function of an n-D continuous network, consisting of a reactance 2-port terminated in a resistance, leads to practical-BIBO stable n-D digital filters after bilinear transformation. An example demonstrates the usefulness of the new definition. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • New statistical algorithm for fault location in toleranced analogue circuits

    Page(s): 243 - 251
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (1121 KB)  

    If an electronic circuit fails during field use it is desirable, with a limited number of diagnostic measurements and computation, to locate the faulty component causing circuit failure. In the paper, a simple statistically based algorithm is presented for the location of a single soft fault in toleranced analogue circuits. At the design stage, component faults are statistically characterised on the basis of simulated faults. By reference to this characterisation, diagnostic responses are selected which, when measured in the field and compared with a data-base of simulated faults, will allow the fault `nearest¿ to the measurement to be determined with adequate discrimination. The method is illustrated by application to a 7-component filter. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Clock breakthrough in ECL integrated circuits

    Page(s): 252 - 256
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (509 KB)  

    Clock breakthrough in emitter-coupled-logic integrated circuits has been investigated by measurement and computer simulation of a clocked bistable operated at clock rates of 80¿320 MHz. The causes of clock breakthrough have been identified and methods of reducing the effect examined. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Four-phase characteristics of a multimode oscillator with second and third harmonic oscillations

    Page(s): 257 - 262
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (602 KB)  

    This paper describes the multimode synchronisation of an oscillator having three resonators of fundamental, second and third harmonic frequencies with an external signal injected. Assuming that the current/voltage relationship of the nonlinear conductance is given by a third-order polynomial, the simplified equations for the amplitude and phase of oscillation are derived by using the method of equivalent linearisation. It is found that four output phases exist which are separated by ¿/2 from one another at the fundamental frequency when an external signal is applied at frequency close to the second harmonic of the oscillator. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Simple switched-capacitor voltage-controlled oscillator

    Page(s): 263 - 266
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (563 KB)  

    A novel switched-capacitor VCO circuit is presented. The charge-balancing principle and bucket-brigade charge-transfer device concepts are used. The resulting circuit is very simple and requires only single-channel enhancement-mode MOS transistors and MOS capacitors. The VCO frequency range is determined by the ratio of two internal capacitors and may be made electrically programmable, if desired. The voltage/frequency relationship is linear. The circuit has been theoretically analysed and a prototype has been built and tested. The circuit required only two nonoverlapping clocks and was operated up to 1 MHz. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Accelerated design of linear or minimum phase FIR filters with a Chebyshev magnitude response

    Page(s): 267 - 270
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (584 KB)  

    An accelerated version of the well known program of Parks and McClellan for the design of linear-phase FIR filters is combined with an improved cepstral procedure to find the corresponding minimum-phase solution. Among three possibilities of speeding up the program, two recently published ones are shown to be doubtful, although a third and new one proves useful. The minimum-phase part follows the method preferred from two methods proposed previously, with some improvements. Further improvements, implemented already or yet to be investigated, are given. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Two-dimensional discrete filters using spatial integrators

    Page(s): 271 - 275
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (501 KB)  

    Two-dimensional recursive digital filters may be implemented using spatial integrators, 1/(z1 ¿ 1) and 1/(z2¿ l), instead of shift operators z1¿1 and z2¿1. It is shown that such filters allow much shorter multiplier coefficient wordlengths to be used. A numerical example confirms that multiplier coefficient wordlengths can be reduced from approximately 28 bits to 8 bits without loss of accuracy in the frequency response of the filter. View full abstract»

    Full text access may be available. Click article title to sign in or learn about subscription options.
  • Book review: Design of High-Performance Negative-Feedback Amplifiers

    Save to Project icon | PDF file iconPDF (104 KB)  
    Freely Available from IEEE