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IEE Proceedings E - Computers and Digital Techniques

Issue 3 • May 1981

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Displaying Results 1 - 8 of 8
  • Speed-optimised microprocessor implementation of a digital filter

    Publication Year: 1981, Page(s):85 - 93
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (1173 KB)

    A practical, efficient scheme is described for the implementation of a real-time programmable digital filter using a microprocessor. The use of distributed arithmetic is known to be able to provide increased speeds by avoiding time-consuming multiplications. To achieve maximum speeds, the working program in a microprocessor implementation should, as far as possible, contain only those instructions... View full abstract»

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  • Icalp 81 - preliminary announcement

    Publication Year: 1981, Page(s): 94
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (136 KB)

    The 8th International Colloquium on Automata, Languages and Programming (ICALP 81) will take place on July 13-17, 1981 in the Palm-Beach Hotel, Acre (Akko), Israel. ICALP 81 is organised by the Computer Science Department of The Technion, Israel Institute of Technology, Haifa, Israel and sponsored by the European Association for Theoretical Computer Science (EATCS). ICALP 81 is supported by the Te... View full abstract»

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  • Design of a bit-slice microcomputer

    Publication Year: 1981
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (832 KB)

    The fact that the synthesis of a microcomputer, to achieve the specific requirements for real-time operation, can be achieved through bit-slice technology is utilised as a design factor. The paper presents the design of a 3 MHz clock frequency microprogrammable microcomputer based on the Intel 3000 series of microprocessors. The requirements of real-time signal processing are included in the compu... View full abstract»

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  • Bit-level synchronisation in microprocessor networks

    Publication Year: 1981, Page(s):103 - 106
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (313 KB)

    A synchronisation method for baseband data transmission in microprocessor networks is developed. The method is applicable in systems using ADCCP-, HDLC- or SDLC-protocols and NRZI-code and point-to-point or loop-mode operation. The method is based on bit resynchronisation using counters. No phase-locked loops are used. This provides a very efficient and fast correction response with relatively sim... View full abstract»

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  • Realisation of multithreshold threshold logic networks using the rademacher-walsh transform

    Publication Year: 1981, Page(s):107 - 113
    Cited by:  Papers (2)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (680 KB)

    A method is proposed by which binary logic functions are resolved into multithreshold form. It is based upon an already existing design algorithm which involves spectral translations, and can be easily adopted for CAD implementation. View full abstract»

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  • Distance measures for near-maximum-likelihood detection processes

    Publication Year: 1981, Page(s):114 - 122
    Cited by:  Papers (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (1130 KB)

    In maximum-or near-maximum-likelihood detection processes of the type frequently considered for use in applications where the digital data signal is received in the presence of both additive noise and severe intersymbol interference, the detector computes, for each of a number of possible sequences of received data symbols, the Euclidean or unitary distance between the corresponding received seque... View full abstract»

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  • Computer-assisted design of PROM-controlled state-machine circuits for logical applications

    Publication Year: 1981, Page(s):123 - 128
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (658 KB)

    In the design of applications such as weather satellite receiving stations the digital circuits are sequential in operation and so lend themselves to a stored-program approach to allow easy functional changes. However, in many cases a conventional microprocessor cannot be used because of speed requirements. This type of circuit can best be implemented using a PROM-controlled state-machine processo... View full abstract»

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  • Economical realisation of asynchronous sequential circuits using random-access memories

    Publication Year: 1981, Page(s):129 - 132
    Cited by:  Papers (2)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (496 KB)

    This paper shows that by taking advantage of a fairly uniform delay distribution in semiconductor random-access memories (ROMs and read-write memories in integrated circuit form) it is possible to realise asynchronous sequential circuits (ASCs) economically. It is shown that the ASC so designed will function without fault, in spite of the presence of races and essential hazards in the ASC. View full abstract»

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