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Solid-State and Electron Devices, IEE Proceedings I

Issue 1 • Date February 1987

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Displaying Results 1 - 5 of 5
  • Transient current instabilities in a-Si: Hp+ni structures

    Page(s): 1 - 6
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (775 KB)  

    It has been demonstrated that amorphous silicon p+ni junctions exhibit nonvolatile polarity dependent memory switching after initial conditioning by means of a high applied potential (`forming¿). The memory on-state is due to the presence of a highly conducting filament, whose physical properties are not well understood. Recent work has shown that in junctions where the i-layer is either thin or lightly n-doped the forming process may be preceded by a transient current instability, which decays even when the voltage across the device is maintained. Unlike the forming process, the occurrence of a current instability does not necessarily modify the device, although progressive changes may result after repeated operation. The magnitude of the current maximum shows only a weak dependence on device area, which suggests that conduction during the current instability is localised within an incipient filament. In certain respects this behaviour resembles the off to on transition observed in notionally analogous crystalline threshold switches, although in our case the high conducting on-state cannot be maintained by a holding voltage. A qualitative model which accounts for most of the observed features is presented and discussed. View full abstract»

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  • Analysis and understanding of GaAs MESFET behaviour in power amplification

    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (990 KB)  

    The paper provides new understanding and analysis of the behaviour of GaAs MESFETs under large signal conditions. It uses an experimental study carried out on an active load bench of the Takayama type with devices made by various methods and a numerical dynamic simulation based on a completely physical description taking into account the nonstationary electronic dynamics, the 2-dimensional effects and the breakdown phenomenon. It gives results for the locus of the load diagram in the FET I/V characteristics and of the FET output impedance in matching conditions, against the power level and the bias conditions. Finally, correlations between gain, efficiency, output power and specifications of the FET are shown and general design rules are given. View full abstract»

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  • Bulk unipolar diodes in the limit of large p-region widths

    Page(s): 17 - 22
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (837 KB)  

    A unified quantitative theory is developed to analyse the electrical properties of bulk unipolar diodes. This theory is also able to account for the transition between the limiting cases of p-plane barrier devices, camel diodes and the conventional bipolar devices. The effect of the minority-carrier charges and currents on the various performances of the devices is included in the theory. The validity of the unified theory is also tested experimentally. View full abstract»

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  • Thermal analysis of a dual-in-line package using the finite-element method

    Page(s): 23 - 31
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (1090 KB)  

    The thermal failure of electronic systems is becoming an increasingly difficult design problem, because of the trend to increase the packing density of components. This paper describes research in which the finite-element method (FEM) is used to investigate steady-state heat transfer in dual-in-line microelectronic package (DIP). Although the paper provides data for the specialist in package design, background information on heat transfer and the FEM has been included to demonstrate the broad applicability of the methods used. The stages in the development of finite-element models of first an 8-pin, and then a 16-pin, DIP are described. A systematic thermal analysis was carried out on the finite-element model of 16-pin DIP when cooled by air, first by natural and then by forced convection. The FEM revealed the complex 3-dimensional temperature field within the package. Computer runs over a range of power dissipation rates showed how both temperature distribution, and thermal resistance, changed in response to changes in external convection. As well as providing data for package cooling, the research highlights the difficulties inherent in providing a standard definition of thermal resistance for users. View full abstract»

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  • Alpha particle induced soft errors in NMOS RAMS: a review

    Page(s): 32 - 44
    Save to Project icon | Click to expandQuick Abstract | PDF file iconPDF (1843 KB)  

    The paper aims to explain the alpha particle induced soft error phenomenon using the NMOS dynamic random access memory (RAM) as a model. It discusses some of the many techniques experimented with by manufacturers to overcome the problem, and gives a review of the literature covering most aspects of soft errors in dynamic RAMs. Finally, the soft error performance of current dynamic RAM and static RAM products from several manufacturers are compared. View full abstract»

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