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IEE Proceedings I - Solid-State and Electron Devices

Issue 5 • October 1980

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Displaying Results 1 - 13 of 13
  • Semiconductor laser analysis: general method for characterising devices of various cross-sectional geometries

    Publication Year: 1980, Page(s):221 - 229
    Cited by:  Papers (11)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (823 KB)

    A formalism for the analysis of semiconductor lasers is described. The treatment includes the interaction between the optical field and the gain profile and thus allows the question of mode stability to be examined. The method of analysis is sufficiently flexible to allow the characterisation of a wide range of devices with varying cross-sectional geometries. In particular, there is no requirement... View full abstract»

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  • General model for defect formation in silicon dioxide

    Publication Year: 1980, Page(s):230 - 234
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (594 KB)

    This paper proposes a general model for the formation of the defects, in silicon dioxide, which conforms to existing concepts involved in the migration of ions through SiO2 and confirms Peek's law. Furthermore the interrelationship between the time required for the formation of any number of defects and the applied electric field is shown to be consistent with the presence of space charge limited ... View full abstract»

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  • Gain/bandwidth predictions for travelling-wave gyrotron

    Publication Year: 1980, Page(s):235 - 240
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (632 KB)

    The small signal gain of a travelling-wave gyrotron is computed using a Pierce description of the interaction between a `fast¿ waveguide mode and a relativistic gyrating electron beam. The mathematical model assumes a matched device containing some selective loss so that moding and backward-wave oscillation problems can be neglected. Whereas from a practical standpoint this simplification may app... View full abstract»

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  • Gunn oscillations in thin GaAs epilayers and m.e.s.f.e.t.s

    Publication Year: 1980, Page(s):241 - 249
    Cited by:  Papers (2)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (983 KB)

    Oscillations due to travelling Gunn domains have been observed in gated and ungated GaAs m.e.s.f.e.t.s (channels) made on v.p.e. and l.p.e. active layers. The doping was 1-2 × 1017 cm ¿3 and the thickness 0.1-0.2 ¿m. In channels with non-negative I/V slope the oscillators were possible only with pulsed bias and decayed 1¿3 ns after switching on the bias. In f.e.t.s the oscillations were self s... View full abstract»

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  • Computer technique for solving schottky barrier from dark forward current-voltage characteristics

    Publication Year: 1980, Page(s):250 - 252
    Cited by:  Papers (1)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (281 KB)

    The paper describes a computer technique for determining series resistance, shunt conductance, saturation current, ideality factor, and hence the apparent barrier height of metal-semiconductor devices from dark forward current characteristics using a least-squares fitting of experimental measurements with a theoretical model. The model used is based on the thermionic theory, incorporating both ser... View full abstract»

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  • Introduction to focused section: Developments in high-speed integrated semiconductor devices

    Publication Year: 1980
    IEEE is not the copyright holder of this material | PDF file iconPDF (69 KB)
    Freely Available from IEEE
  • Device and circuit trends in gigabit logic

    Publication Year: 1980, Page(s):254 - 265
    Cited by:  Papers (4)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (2048 KB)

    Recent implementations of Gbs¿1 integrated circuits are mentioned and used as the basis for a capability projection of the more promising technologies. After first describing the projection strategy, both the silicon and GaAs circuit families are assessed with regard to their performance limits. A shorter analysis of Josephson technology follows. For scaled down devices in silicon as well as seve... View full abstract»

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  • Gallium arsenide review: past, present and future

    Publication Year: 1980, Page(s):266 - 269
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (579 KB)

    The tremendous growth of communications systems in recent years has put a demand on the electronics industry to provide higher speed integrated circuits than are currently available with today's silicon technology. To help meet this demand, the electronics industry is developing new semiconductor materials such as gallium arsenide which already report clock frequencies of 1-3 GHz in GaAs integrate... View full abstract»

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  • A 3.5 GHz self-aligned single-clocked binary frequency divider on GaAs

    Publication Year: 1980, Page(s):270 - 277
    Cited by:  Papers (6)
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (854 KB)

    A fully planar self-aligned technology has been ultilised to fabricate a monolithic single-clocked binary frequency divider consisting of a gated master/slave flip-flop and a complementary clock-pulse generator to drive it. An optimised version of the gated m.s. flip-flop is presented along with the m. e.s.f.e.t.model used for the simulations. Correct counting from d.c. up to 5.5 GHz for the gated... View full abstract»

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  • Charge-coupled devices in gallium arsenide

    Publication Year: 1980, Page(s):278 - 286
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (1076 KB)

    The electronic properties of GaAs and their implications to device performance have been the subject of discussion for some time, and discrete devices such as diodes and f.e.t, with performance exceeding that which has been achieved in similar silicon devices, are commercially available. Recent advances in GaAs material and processing technologies have made possible the realisation of integrated d... View full abstract»

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  • Low pinch-off voltage f.e.t. logic (l.p.f.l.): I.s.i. oriented logic approach using quasinormally off GaAs m.e.s.f.e.t.s.

    Publication Year: 1980, Page(s):287 - 296
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (1102 KB)

    A new l.s.i. oriented logic approach, low pinch-off voltage f.e.t. logic (l.p.f.l.), leading to highly versatile logic gates capable of combining high speed and low power consumption and requiring a standard fabrication process, is introduced and structures of complex logic gates realisable with this approach are described. Furthermore, a tentative comparison of the l.p.f.l. approach with other m.... View full abstract»

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  • Erratum: Inversion-controlled switching mechanism of m.i.s.s. devices

    Publication Year: 1980
    IEEE is not the copyright holder of this material | PDF file iconPDF (83 KB)
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  • Capacitor coupling of GaAs defletion-mode f.e.t.s.

    Publication Year: 1980, Page(s):297 - 300
    IEEE is not the copyright holder of this material | Click to expandAbstract | PDF file iconPDF (501 KB)

    Integration of GaAs depletion mode f.e.t.s requires voltage level shifting between logic stages. Capacitor coupling provides such a shift without the need for additional power rails and with a high tolerance of process parameter variations; being passive, the level shifting consumes no additional power. Data can also be retained dynamically on capacitors in clocked circuits providing exceptionally... View full abstract»

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