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Circuits and Systems Magazine, IEEE

Issue 4 • Date Fourth Quarter 2008

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Displaying Results 1 - 8 of 8
  • Front cover - IEEE Circuits and Systems Magazine - Fourth Quarter - 2008

    Publication Year: 2008 , Page(s): C1
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  • Table of contents

    Publication Year: 2008 , Page(s): 1 - 2
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  • To Be, Or Not to Be an Editor: That Is the Question [From the Editor]

    Publication Year: 2008 , Page(s): 4
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  • CASS Editors Forum

    Publication Year: 2008 , Page(s): 6 - 16
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  • A Jumping Genes Paradigm: Theory, Verification and Applications

    Publication Year: 2008 , Page(s): 18 - 36
    Cited by:  Papers (5)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (6237 KB) |  | HTML iconHTML  

    A new evolutionary computing algorithm on the basis of "jumping genes" phenomenon is presented in this article. It emulates the gene transposition in the genome that was discovered by Nobel Laureate Dr. Barbara McClintock from her work on maize chromosome. The principle of jumping genes, adopted for evolutionary computing, is outlined and the procedures for executing the computational optimization are provided. Mathematical derivation of the schema theorem is briefly discussed, which is established to demonstrate the searching capacity of the newly proposed algorithm, in terms of convergence and diversity. The algorithm is found to be robust and provides outcomes in speed and accuracy, while the solutions are widely spread along the Pareto-optimal front when a multiobjective problem is tackled. T o further reinforce the jumping genes proposition, some typical engineering design problems are included. The obtained results have indicated that this new algorithm is indeed capable of searching multiobjective solutions including the extreme solutions at both ends of the Pareto-optimal front. View full abstract»

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  • Capturing device mismatch in analog and mixed-signal designs

    Publication Year: 2008 , Page(s): 37 - 44
    Cited by:  Papers (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (2323 KB) |  | HTML iconHTML  

    As feature size goes below 70 nm, process variation introduced device mismatch may cause over 40% performance variations and circuit failures especially for analog/mixed-signal designs. The location dependent correlations among devices and the large number of devices in some practical designs make it difficult to predict performance corners accurately and efficiently. This paper aims to provide an overview of possible methodologies and approaches that model and analyze device mismatch. In particular, the paper describes a new finite point device modeling technique that can speed up the analysis procedure, a new parametric reduction method and a novel Chebyshev Affine Arithmetic (CAA) based performance bound estimation approach. View full abstract»

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  • Architectures for multi-gigabit wire-linked clock and data recovery

    Publication Year: 2008 , Page(s): 45 - 57
    Cited by:  Papers (15)  |  Patents (1)
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (2441 KB) |  | HTML iconHTML  

    Clock and data recovery (CDR) architectures used in high-speed wire-linked communication receivers are often shown as PLL or DLL based topologies. However, there are many other types of CDR architectures such as phase-interpolator, oversampling and injection locked based topologies. The best choice for the CDR topology will depend on the application and the specification requirements. This paper presents an overview and comparative study of the most commonly used CDR architectures. This analysis includes the circuit structures, design challenges, major performance limitations and primary applications. Finally, the tradeoffs among the various CDR architectures are summarized. View full abstract»

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  • Can I patent that?

    Publication Year: 2008 , Page(s): 58 - 63
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1613 KB) |  | HTML iconHTML  

    Patent protection is the most difficult intellectual property protection to acquire but it is also the most powerful. I am frequently asked the question, "What is patentable in the United States?" The answer is that four requirements must be satisfied in order to attain and maintain patent protection in the United States. Those four requirements correspond to sections of the patent statute that are located under title 35 of the United States Code (35 U.S.C.): 101 (statutory subject matter), 102 (novelty), 103 (non-obviousness) and 112 (certain written requirements). This article will detail those four requirements and focus on how they relate to inventions relating to circuits and systems. View full abstract»

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Aims & Scope

Insofar as the technical articles presented in the proposed magazine, the plan is to cover the subject areas represented by the Society's transactions, including: analog, passive, switch capacitor, and digital filters; electronic circuits, networks, graph theory, and RF communication circuits; system theory; discrete, IC, and VLSI circuit design; multidimensional circuits and systems; large-scale systems and power networks; nonlinear circuits and systems, wavelets, filter banks, and applications; neural networks; and signal processing.

Full Aims & Scope

Meet Our Editors

Editor-in-Chief
Chi K. Tse
Hong Kong Polytechnic University