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Proceedings of the Fourth Annual Symposium on Switching Circuit Theory and Logical Design (swct 1963)

28-30 Oct. 1963

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Displaying Results 1 - 16 of 16
  • [Front cover]

    Publication Year: 1963, Page(s): C1
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    Freely Available from IEEE
  • Table of contents

    Publication Year: 1963, Page(s): c2
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  • Foreword

    Publication Year: 1963, Page(s): c3
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    Freely Available from IEEE
  • Infinite sequences and finite machines

    Publication Year: 1963, Page(s):3 - 16
    Cited by:  Papers (38)
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  • Two-sided finite-state transductions

    Publication Year: 1963, Page(s):17 - 22
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (522 KB)

    A transduction, in the sense of this paper, is a n-ary word relation (which may be a function) describable by a finite directed labeled graph. The class of all n-ary transductions is co-extensive with the Kleenean closure of finite n-ary relations. The 1-ary transductions are exactly the sets recognizable by finite automata. However, for n ≫ 1 the relations recognizable by finite automata c... View full abstract»

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  • On computability by certain classes of restricted turing machines

    Publication Year: 1963, Page(s):23 - 32
    Cited by:  Papers (4)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (749 KB)

    The theory of abstract machines has been well developed for the finite automaton [RS] and the Turing machine [D]. More recently, machines intermediate in computing power between the above two classes of machines have been investigated. These machines have some form of unbounded memory, thus giving them more potential computing ability than the finite automata, but the access to the unbounded memor... View full abstract»

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  • Bilateral threshold nets

    Publication Year: 1963, Page(s):33 - 40
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  • Threshold gate realizations of logical functions with don't cares

    Publication Year: 1963, Page(s):41 - 52
    Cited by:  Papers (3)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (874 KB)

    Methods are presented for synthesizing incomplete logical functions by threshold gate networks. Single-gate realizations are obtained when they exist; otherwise multi-gate networks result. The procedures are simple modifications of the tree method for realizing complete functions. They are not appreciably complicated by the "don't care" condition. View full abstract»

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  • On the analysis of functional symmetry

    Publication Year: 1963, Page(s):53 - 62
    Cited by:  Papers (1)
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  • The minimal synthesis of tree structures

    Publication Year: 1963, Page(s):63 - 82
    Cited by:  Papers (5)
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  • Determining the best ordering of variables in cascade switching circuits

    Publication Year: 1963, Page(s):83 - 104
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1887 KB)

    Cascade switching circuits include collapsed-tree, iterative, sequential, multiple iterative, and cascaded sequential switching circuits. The cost of such a circuit is dependent on the order in which the input variables are applied to the circuit. This paper reviews a previously described procedure for the synthesis of cascade circuits and shows how it may be adapted so as to non-enumeratively det... View full abstract»

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  • Sequential circuit synthesis using input delays

    Publication Year: 1963, Page(s):105 - 116
    Cited by:  Papers (7)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (815 KB)

    This paper describes a new type of circuit realization for asynchronous sequential circuits of the type described by Huffman and Caldwell. This new realization differs from conventional realizations in that delay elements are associated with the input lines. A synthesis procedure is developed for this new type of circuit, and it is proved that a large class of sequential circuits can be realized i... View full abstract»

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  • Finite automata and badly timed elements

    Publication Year: 1963, Page(s):117 - 130
    Cited by:  Papers (5)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (1766 KB)

    This paper summarizes some rather extensive research on the problem of constructing logic nets out of elements whose timing causes trouble either in their slowness or in their lack of precision. The problem is made precise by setting up a theory of logic nets that is abstract but realistic. Its abstractness consists in its lack of similarity to any particular hardware, and in its strictly mathemat... View full abstract»

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  • Demostrating Hazards in sequential relay circuits

    Publication Year: 1963, Page(s):131 - 136
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (410 KB)

    A method for demonstrating the effects of hazards in sequential relay circuits is given. The device used in the demonstration, containing relays with mirrors glued to their armatures, a light source, a focusing lens, and control circuits for the relays, is described. The armatureposition - relay-excitation diagram, developed by the author for the purpose, is utilized for analyzing the behavior of ... View full abstract»

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  • Logical design theory of NOR gate networks with no complemented inputs

    Publication Year: 1963, Page(s):137 - 148
    Cited by:  Papers (10)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (824 KB)

    It can he easily shown that any combinational circuit with only uncomplemented inputs can be realized using three stages of NOR logic. However, if such a circuit is designed by a direct extension of the theory of two-stage circuits using AND Gates and OR Gates. the result- will not be an efficient circuit. In order to design such NOR gate circuits efficiently it is necessary to modify the design t... View full abstract»

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  • A survey of asynchronous logic: Comparing various definitions and models for asynchronous switching circuits

    Publication Year: 1963, Page(s):149 - 152
    Cited by:  Papers (1)
    Request permission for commercial reuse | Click to expandAbstract | PDF file iconPDF (242 KB)

    The notion of asynchronous switching circuit is roughly understood to be a logical circuit, possibly sequential, in which no special synchronizing signals or "clock" are required for proper circuit operation. Many different formulations of this notion appear in the literature, using sequential machine models and networks of logical element models. The following list of references indicates this di... View full abstract»

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