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# IEEE Transactions on Circuits and Systems II: Express Briefs

## Filter Results

Displaying Results 1 - 25 of 28

Publication Year: 2008, Page(s):C1 - C4
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• ### IEEE Transactions on Circuits and Systems—II: Express Briefs publication information

Publication Year: 2008, Page(s): C2
| PDF (39 KB)
• ### Optimal Lossy Matching by Pareto Fronts

Publication Year: 2008, Page(s):497 - 501
Cited by:  Papers (7)
| | PDF (515 KB) | HTML

Although lossy matching is not a standard antenna matching technique, well-designed losses can facilitate wide-band matching of otherwise unmatchable antennas. The lossy matching designs developed in this paper are based on the Pareto front. These Pareto front computations permit the circuit designer to graphically select optimal gain-reflection tradeoffs for lossy matching, readily incorporate ot... View full abstract»

• ### Single Amplifier Bi-Quadratic Filter Topologies in Transimpedance Configuration

Publication Year: 2008, Page(s):502 - 506
Cited by:  Papers (3)
| | PDF (381 KB) | HTML

Active-RC configurations, implemented as cascaded bi-quadratic sections (biquads), are the filters of choice for low distortion applications in the base-band. For low power and area applications, single amplifier biquads are best, and are well studied in literature. However, in many applications the input signal is in current domain while the output is a voltage. Output of a current steering digit... View full abstract»

• ### Transformer-Coupled Power Amplifier Stability and Power Back-Off Analysis

Publication Year: 2008, Page(s):507 - 511
Cited by:  Papers (11)  |  Patents (1)
| | PDF (277 KB) | HTML

We present a mathematical analysis of the common-mode instability and power back-off feature of a transformer-coupled Class-AB differential power amplifier (PA). The efficient impedance matching of the transformer combiner and efficiency improvement at power back-off, a major benefit of this structure, are illustrated. In addition, an analytical model is derived to predict the common-mode oscillat... View full abstract»

• ### Modeling and Technique to Improve PSRR and PS-IMD in Analog PWM Class-D Amplifiers

Publication Year: 2008, Page(s):512 - 516
Cited by:  Papers (26)
| | PDF (540 KB) | HTML

Although power-supply noise, qualified by power- supply rejection ratio (PSRR), has been recognized as a potential drawback of Class-D amplifiers (CDAs) compared to linear amplifiers, the mechanisms of PSRR for CDAs are not well established. It is also not well recognized that the power-supply noise can intermodulate with the input signal, manifesting into power-supply induced intermodulation dist... View full abstract»

• ### Sub-nH Inductor Modeling and Design in 90-nm CMOS Technology for Millimeter-Wave Applications

Publication Year: 2008, Page(s):517 - 521
Cited by:  Papers (3)
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Inductor design is an important issue in millimeter-wave CMOS circuits. In these frequencies the required inductance is very small and hence special structure is required for inductors. The quality factor is the most important design parameter for these inductors, especially in CMOS process. To incorporate these inductors in circuit simulation, a simple lumped model is necessary. This work propose... View full abstract»

• ### A Calibration Technique for Very Low Current and Compact Tunable Neuromorphic Cells: Application to 5-bit 20-nA DACs

Publication Year: 2008, Page(s):522 - 526
Cited by:  Papers (9)
| | PDF (674 KB) | HTML

Low current applications, like neuromorphic circuits, where operating currents can be as low as a few nanoamperes or less, suffer from huge transistor mismatches, resulting in around or less than 1-bit precisions. A neuromorphic programmable-kernel 2-D convolution chip has been reported where each pixel included two compact calibrated digital-to-analog converters (DACs) of 5-bit resolution, for cu... View full abstract»

• ### A Tunable Pseudo-Differential OTA With $-78~{hbox {dB}}$ THD Consuming 1.25 mW

Publication Year: 2008, Page(s):527 - 531
Cited by:  Papers (12)
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A novel linear tunable transconductor based on a combination of linearization techniques is presented. The input signal is transferred to the V-I conversion element by means of a high-speed feedback loop. Then, the linear V-I conversion is accomplished using quasi-floating-gate MOS transistors biased in the triode region. Finally, the absence of current mirrors in the signal path provides low sens... View full abstract»

• ### The Effect of Noise Cross-Coupling on Time-Interleaved Delta-Sigma ADCs

Publication Year: 2008, Page(s):532 - 536
Cited by:  Papers (6)  |  Patents (2)
| | PDF (517 KB) | HTML

An analysis of the quantization noise in symmetric coupled time-interleaved delta-sigma analog-to-digital converters (TI-DS-ADCs) is presented. Sufficient conditions are derived that ensure that the quantization noise is asymptotically uniformly distributed and independent of delayed versions of itself and the input. Application of the conditions is illustrated in example TI-DS-ADCs. View full abstract»

• ### A Fast and Compact Analog Buffer Design for Active Matrix Liquid Crystal Displays Using Polysilicon Thin-Film Transistors

Publication Year: 2008, Page(s):537 - 540
Cited by:  Papers (9)
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This paper presents a new source-follower type analog buffer for active-matrix liquid crystal displays applications, which exhibits high immunity to the threshold voltage variations of the polysilicon (poly-Si) thin-film transistors (TFTs). The functionality of the buffer was verified through simulations. In order for the simulations to be realistic, parameters extraction from fabricated poly-Si T... View full abstract»

• ### Current-Mode Linear Transformation Filters Using Current Mirrors

Publication Year: 2008, Page(s):541 - 545
Cited by:  Papers (9)
| | PDF (314 KB) | HTML

Novel building blocks for designing high-order current-mode filters by employing current mirrors as the elementary active elements are introduced in this paper. As a design example, a fifth-order elliptic current-mode filter is designed using only grounded capacitors. Simulation results using transistor parameters of a typical CMOS 0.35- technology are in a good agreement with the theoretically ex... View full abstract»

• ### Gated-Clock Design of Linear-Feedback Shift Registers

Publication Year: 2008, Page(s):546 - 550
Cited by:  Papers (14)
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In this paper, we will present a method to reduce the power consumption of the popular linear feedback shift register. The proposed scheme is based on the gated clock design approach and it can offer a significant power reduction, depending on technological characteristics of the employed gates. Moreover, the analytical condition that must be satisfied to achieve a power reduction of the gated-clo... View full abstract»

• ### A New Architecture for High-Density High-Performance SGT nor Flash Memory

Publication Year: 2008, Page(s):551 - 555
Cited by:  Papers (4)  |  Patents (1)
| | PDF (507 KB) | HTML

In order to overcome the limitation of a conventional NOR flash memory, we propose a new architecture using a surrounding gate transistor (SGT) NOR flash memory to realize both Fowler-Nordheim (FN)-tunneling program and high-speed random access read operation. The SGT NOR flash memory cell has a 3D structure, in which the source, gate and drain are vertically stacked. The gate surrounds a silicon ... View full abstract»

• ### Low-Voltage Bootstrapped CMOS Drivers With Efficient Conditional Bootstrapping

Publication Year: 2008, Page(s):556 - 560
Cited by:  Papers (6)
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In this paper, a set of low-voltage bootstrapped CMOS drivers are presented to reduce power consumption and improve switching speed for driving a large capacitive load. The proposed drivers can reduce the power consumption by making bootstrap operations conditional to input statistics. They also improve switching speed by providing larger bootstrap voltages for the same amount of integrated bootst... View full abstract»

• ### Performance Analysis of Single-Frequency CW Signal-Based I/Q Regeneration in Five-Port Junction-Based Direct Receivers on Rayleigh Fading Channels

Publication Year: 2008, Page(s):561 - 565
Cited by:  Papers (2)
| | PDF (319 KB) | HTML

This paper analyzes the influence of the Rayleigh fading channel on the performance of a single-frequency continuous-wave (CW) signal-based I/Q regeneration in five-port junction-based direct receivers. This method uses a single-frequency CW signal to estimate the I/Q regeneration parameters. Simulation results show that the eye diagram, error vector magnitude, and bit error rate performances of f... View full abstract»

• ### Radix-3$,times,$3 Algorithm for The 2-D Discrete Hartley Transform

Publication Year: 2008, Page(s):566 - 570
Cited by:  Papers (5)
| | PDF (367 KB) | HTML

In this correspondence, we propose a vector-radix algorithm for the fast computation of a 2-D discrete Hartley transform (DHT). For data sequences whose length is a power of three, a radix-3 times 3 decimation in frequency algorithm is developed. It decomposes a length-N times N DHT into nine length-(N/3) times N (N/3) DHTs. Comparison of the computational complexity with known algorithms shows th... View full abstract»

• ### On the Design of Nearly-PR and PR FIR Cosine Modulated Filter Banks Having Approximate Cosine-Rolloff Transition Band

Publication Year: 2008, Page(s):571 - 575
Cited by:  Papers (16)
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This paper proposes an efficient method for designing nearly perfect reconstruction (NPR) and perfect reconstruction (PR) cosine modulated filter banks (CMFBs) with prototype filters having an approximate cosine-rolloff (CR) transition band. It is shown that the flatness condition required for an NPR CMFB can be automatically satisfied by using a prototype filter with a CR transition band. The des... View full abstract»

• ### A Recursive Frequency Estimator Using Linear Prediction and a Kalman-Filter-Based Iterative Algorithm

Publication Year: 2008, Page(s):576 - 580
Cited by:  Papers (17)  |  Patents (2)
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This paper proposes a new Kalman-filter-based recursive frequency estimator for discrete-time multicomponent sinusoidal signals whose frequencies may be time-varying. The frequency estimator is based on the linear prediction approach and it employs the Kalman filter to track the linear prediction coefficients (LPCs) recursively. Frequencies of the sinusoids can then be computed using the estimated... View full abstract»

• ### Chaos-Coded Modulations Over Rician and Rayleigh Flat Fading Channels

Publication Year: 2008, Page(s):581 - 585
Cited by:  Papers (11)
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In this brief, we analyze a kind of chaos-coded modulations over both Rician and Rayleigh frequency non-selective uncorrelated fading in the presence of additive white Gaussian noise. We provide bounds both for the case when perfect channel-state information (CSI) is available at the decoder and when there is no CSI. We show that the bounds proposed can be tight enough to give reason of the behavi... View full abstract»

• ### Global Asymptotical Synchronization of Chaotic Lur'e Systems Using Sampled Data: A Linear Matrix Inequality Approach

Publication Year: 2008, Page(s):586 - 590
Cited by:  Papers (61)
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Sampled-data feedback control for master-slave synchronization schemes that consist of identical chaotic Lur'e systems is studied. Sufficient conditions for global asymptotic synchronization of such chaotic Lur'e systems are obtained using the free-weighting matrix approach and expressed in terms of linear matrix inequalities (LMIs). With the help of the LMI solvers, the sampled-data feedback cont... View full abstract»

• ### Delay-Dependent Approaches to Globally Exponential Stability for Recurrent Neural Networks

Publication Year: 2008, Page(s):591 - 595
Cited by:  Papers (35)
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This brief deals with the stability analysis problem for recurrent neural networks with delay. An improved stability condition is derived to guarantee the existence of the unique equilibrium point and its globally exponential stability, which is shown with novel methods. Both delay-dependent and delay-independent stability conditions are obtained. Expressed in terms of LMIs, they can be checked us... View full abstract»

• ### Wiener's Analysis of the Discrete-Time Phase-Locked Loop With Loop Delay

Publication Year: 2008, Page(s):596 - 600
Cited by:  Papers (19)
| | PDF (246 KB) | HTML

The discrete-time phase-locked loop (PLL) operating at the steady state is considered in this paper. Phase noise, which always affects oscillators, is modeled as a stationary random waveform and optimization of the loop filter is worked out in the light of Wiener's theory. Delay in the loop, which may affect the numerical implementation of the PLL, is considered. The main results and novelties of ... View full abstract»

• ### Time-Domain Modeling of an RF All-Digital PLL

Publication Year: 2008, Page(s):601 - 605
Cited by:  Papers (21)  |  Patents (6)
| | PDF (407 KB) | HTML

A new phase-domain all-digital phase-locked loop (ADPLL) for RF wireless applications has recently been proposed and commercially demonstrated. In this brief, we propose time-domain modeling and simulation techniques of the ADPLL that are well suited for system analysis using high-level programming languages, e.g., Matlab. They are based on the event-driven principles inherent in hardware descript... View full abstract»

• ### Special issue on Circuits and Systems solutions for nanoscale CMOS design challenges

Publication Year: 2008, Page(s): 606
| PDF (682 KB)

## Aims & Scope

Part I will now contain regular papers focusing on all matters related to fundamental theory, applications, analog and digital signal processing. Part II will report on the latest significant results across all of these topic areas.

Full Aims & Scope

## Meet Our Editors

Editor-in-Chief

Chi K. Michael Tse
Dept. of Electronic and Information Engineering
Hong Kong Polytechnic University
Hunghom, Hong Kong
cktse@ieee.org