Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
Issue 6 • Date June 2008
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Table of contents
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PDF (54 KB)
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IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems publication information
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PDF (43 KB)
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A Reconfigurable Scan Architecture With Weighted Scan-Enable Signals for Deterministic BIST
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PDF (517 KB)
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Exact and Approximate Algorithms for the Optimization of Area and Delay in Multiple Constant Multiplications
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PDF (653 KB)
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Statistical Thermal Profile Considering Process Variations: Analysis and Applications
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PDF (578 KB)
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Defining Statistical Timing Sensitivity for Logic Circuits With Large-Scale Process and Environmental Variations
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PDF (655 KB)
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An Optimal Network-Flow-Based Simultaneous Diode and Jumper Insertion Algorithm for Antenna Fixing
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PDF (1150 KB)
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Code and Data Structure Partitioning for Parallel and Flexible MPSoC Specification Using Designer-Controlled Recoding
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PDF (729 KB)
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Application and Verification of Local Nonsemantic-Preserving Transformations in System Design
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PDF (1007 KB)
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Diagnosis of Multiple Scan Chain Timing Faults
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PDF (1112 KB)
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Symmetry Detection and Boolean Matching Utilizing a Signature-Based Canonical Form of Boolean Functions
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IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems society information
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HTMLAims & Scope
Contains articles on methods, algorithms, and human-machine interfaces for physical and logical design, including: planning, synthesis, partitioning, modeling, simulation, layout, verification, testing, and documentation of integrated-circuit and systems designs of all complexities.
Meet Our Editors
Editor-in-Chief
Sachin Sapatnekar
University of Minnesota
Dept. of Electrical and Computer Engineering
4-174 Keller Hall, 200 Union Street SE
Minneapolis, MN 55455 55455 USA
sachin@umn.edu
