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Microwave Theory and Techniques, IEEE Transactions on

Issue 5  Part 2 • Date May 2008

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  • Table of contents

    Page(s): C1
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  • IEEE Transactions on Microwave Theory and Techniques publication information

    Page(s): C2
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  • Guest Editorial

    Page(s): 1217
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  • Resistive-Feedback CMOS Low-Noise Amplifiers for Multiband Applications

    Page(s): 1218 - 1225
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1791 KB) |  | HTML iconHTML  

    Extremely compact resistive-feedback CMOS low-noise amplifiers (LNAs) are presented as a cost-effective alternative to multiple narrowband LNAs using high-Q inductors for multiband wireless applications. Limited linearity and high power consumption of the inductorless resistive-feedback LNAs are analyzed and circuit techniques are proposed to solve these issues. A 12-mW resistive-feedback LNA, based on current-reuse transconductance boosting is presented with a gain of 21 dB and a noise figure (NF) of 2.6 dB at 5 GHz. The LNA achieves an output third-order intercept point (IP3) of 12.3 dBm at 5 GHz by reducing loop-gain rolloff and by improving linearity of individual stages. The active die area of the LNA is only 0.012 mm2. A 9.2-mW tuned resistive-feedback LNA utilizing a single compact low-Q on-chip inductor is presented, showing an improved tradeoff between performance, power consumption, and die area. At 5.5 GHz, the fully integrated LNA achieves a measured gain of 24 dB, an NF of 2 dB, and an output IP3 of 21.5 dBm. The LNA draws 7.7 mA from the 1.2-V supply and has a 3-dB bandwidth of 3.94 GHz (4.04-7.98 GHz). The LNA occupies a die area of 0.022 mm2. Both LNAs are implemented in a 90-nm CMOS process and do not require any costly RF enhancement options. View full abstract»

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  • A 52-GHz 8.5-dB Traveling-Wave Amplifier in 0.13- \mu m Standard CMOS Process

    Page(s): 1226 - 1233
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    The design of a traveling-wave amplifier (TWA) in 0.13-mum standard CMOS technology is presented. It is designed to maximize the gain-bandwidth product (GBP). An asymmetric cascode, coplanar waveguide (CPW), and loss compensation technique enables maximization of the TWA GBP. Design and modeling of 90-Omega CPW used to synthesize inductors of the TWA lines is presented. Simulations with a design kit and developed models for CPW show a 52-GHz bandwidth with a maximum power gain of 8.5 dB at 10 GHz for a 135-mW power consumption. Measurements up to 40 GHz confirm these results. View full abstract»

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  • A 28.5–32-GHz Fast Settling Multichannel PLL Synthesizer for 60-GHz WPAN Radio

    Page(s): 1234 - 1246
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (2488 KB) |  | HTML iconHTML  

    A 28.5-32-GHz fast settling multichannel frequency synthesizer is implemented in 0.25-mum SiGe : C BiCMOS process technology for 60-GHz wireless personal area network (WPAN) applications. The phase-locked loop (PLL) synthesizes carrier frequencies between 28.5-32 GHz in step of 500 MHz, and settles in approximately 327 ns. The proposed PLL can be employed as a frequency source providing eight channels of frequency hopping carriers for 60-GHz WPAN radio. To generate eight channels of carriers, an integer-N PLL with 125-MHz reference frequency is implemented, and a programmable divider with all differential current-steering circuits is designed. The programmable divider reliably provides divide ratios of 114-128 at 15 GHz. To achieve eight channels of carriers at a challenging frequency of 30 GHz, a push-push voltage-controlled oscillator is employed using a Wilkinson power combiner. The PLL consumes 115 mA at 2.5 V and achieves phase noise of -81 dBc/Hz at 1-MHz offset measured from 32-GHz push-push carrier. View full abstract»

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  • A 24-GHz CMOS Passive Subharmonic Mixer/Downconverter for Zero-IF Applications

    Page(s): 1247 - 1256
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    The design and implementation of a 24-GHz subharmonic-mixer-based downconverter based on a multiphase local oscillator (LO) is presented. Fabricated in a 0.13-mum CMOS process, the downconverter includes a pre-amplifier and an IF buffer and consumes 14.4 mW from a 1.6-V supply. The quadrature LO buffer consumes 15 mA at 1.2 V. The circuit includes a single-ended to differential phase splitter for the LO. The downconverter has a conversion gain of 3.2 dB and double-sideband noise figure of 10 dB. The measured input referred 1-dB compression point is -12.7 dBm. DC offsets were less than 2 mV. View full abstract»

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  • A 9-bit Quadrature Direct Digital Synthesizer Implemented in 0.18- \mu{\hbox {m}} SiGe BiCMOS Technology

    Page(s): 1257 - 1266
    Save to Project icon | Request Permissions | Click to expandQuick Abstract | PDF file iconPDF (1243 KB) |  | HTML iconHTML  

    This paper describes a 9-bit 6.2-GHz low power quadrature direct digital synthesizer (DDS) implemented in a 0.18-mum SiGe BiCMOS technology. With a 9-bit pipeline accumulator and two 8-bit sine-weighted current steering DACs, this DDS is capable of generating quadrature sinusoidal waveforms up to 3.15 GHz with a maximum clock frequency of 6.2 GHz. Packed with more than 13 500 transistors, the quadrature DDS occupies an active area of 2.3 times 2.5 mm2 and a total die area of 3.0 times 3.0 mm2. The measured spurious-free dynamic range is approximately 26 dBc at a clock frequency 6.2 GHz. At the maximum clock frequency, the power consumption of the DDS is 2.5 W with 3.3- and 4.0-V power supplies for the digital and analog parts, respectively. The DDS thus achieves a power efficiency figure-of-merit of 5.04 GHz/W/phase. The DDS chips were packaged with 48-pin ceramic leadless chip carriers and air cooling was used during the measurement. View full abstract»

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  • A UHF Near-Field RFID System With Fully Integrated Transponder

    Page(s): 1267 - 1277
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    This paper presents an RF identification (RFID) system with a fully integrated transponder. To enable the on-chip integration of the tag's antenna, it is suggested to employ near-field coupling at high-frequency ranges, i.e., the UHF band. The RFID system including the reader and key blocks of the transponder is designed and fabricated in a standard CMOS 0.18-mum process. The system operates at 900 MHz with the coverage range of over 0.4 cm. The tag's antenna is integrated on-chip without using any special process. The reader employs multiple coils to increase its coverage area. Using a proper output network, the reader can deliver a current of 225 mA (rms) to its coil, which is designed on a printed circuit board. View full abstract»

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  • Novel CMOS Circuits to Measure Data-Dependent Jitter, Random Jitter, and Sinusoidal Jitter in Real Time

    Page(s): 1278 - 1285
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    This paper presents a new zero dead-time architecture for data jitter measurement, which is suitable for on- or off-chip implementations. Two circuits for measurement of data-dependent jitter (DDJ), random jitter (RJ), and sinusoidal jitter (SJ) are demonstrated. The circuits were implemented in a 0.11-mum CMOS process with 1.2-V supply. They utilize a data-to-clock converter, pulse generators, and an integrator followed by a sample-and-hold. The circuits do not require a reference clock, and can demodulate a jittery random binary sequence to output either a DDJ or RJ or SJ waveform in real time. The SJ sensitivity of the circuit with sample-and-hold is 11 muV/ps with an error of 1.56 psRMS for a 2.5-Gb/s seven-stage pseudorandom binary sequence. The RJ sensitivity of the other circuit without sample-and-hold is 38 muV/ps. View full abstract»

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  • Low-Capacitance SCR With Waffle Layout Structure for On-Chip ESD Protection in RF ICs

    Page(s): 1286 - 1294
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    The silicon-controlled rectifier (SCR) has been used as an effective on-chip electrostatic discharge (ESD) protection device in CMOS technology due to the highest ESD robustness in nanoscale integrated circuits (ICs). In this study, the SCR realized in a waffle layout structure is proposed to improve ESD current distribution efficiency for ESD protection and to reduce the parasitic capacitance. The waffle layout structure of the SCR can achieve smaller parasitic capacitance under the same ESD robustness. With smaller parasitic capacitance, the degradation on RF circuit performance due to ESD protection devices can be reduced. The proposed waffle SCR with low parasitic capacitance is suitable for on-chip ESD protection in RF ICs. Besides, the desired current to trigger on the SCR device with a waffle layout structure and its turn-on time has also been investigated in a silicon chip. View full abstract»

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  • Hot-Carrier-Induced Damage and Its Spatial Location on RF Noise in Deep-Submicrometer NMOSFETs

    Page(s): 1295 - 1300
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    In this paper, the impact of hot-carrier (HC)-induced interface damage and its spatial location on RF noise in 0.18-mum NMOSFETs have been characterized and analyzed. The experimental results revealed a significant increase in NFmin and Rn, which could be attributed to the additional channel noise component associated with the HC-induced interface damage. It is found that the presence of interface states at the source side has greater impact on the increase in channel noise, which is consistent with the recent theoretical simulation using the hydrodynamic and full Langevin-Boltzmann equation noise models based on impedance field representation. Our results provide direct experimental verification that the local noise at the source side plays a more important role in determining the overall channel noise. View full abstract»

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  • IEEE Transactions on Microwave Theory and Techniques information for authors

    Page(s): 1301
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  • IEEE Microwave Theory and Techniques Society Information

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The IEEE Transactions on Microwave Theory and Techniques focuses on that part of engineering and theory associated with microwave/millimeter-wave components, devices, circuits, and systems involving the generation, modulation, demodulation, control, transmission, and detection of microwave signals. This includes scientific, technical, and industrial, activities. Microwave theory and techniques relates to electromagnetic waves usually in the frequency region between a few MHz and a THz; other spectral regions and wave types are included within the scope of the Society whenever basic microwave theory and techniques can yield useful results. Generally, this occurs in the theory of wave propagation in structures with dimensions comparable to a wavelength, and in the related techniques for analysis and design..

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